diff --git a/.mxproject b/.mxproject
index 018661e..e4ad70a 100644
--- a/.mxproject
+++ b/.mxproject
@@ -1,5 +1,5 @@
 [PreviousLibFiles]
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mon/src/nx_arp_queue_send.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entries_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entry_create.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entry_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entry_delete_internal.c;Middlewares/ST/netxduo/common/src/nx_icmp_cleanup.c;Middlewares/ST/netxduo/common/src/nx_icmp_enable.c;Middlewares/ST/netxduo/common/src/nx_icmp_info_get.c;Middlewares/ST/netxduo/common/src/nx_icmp_interface_ping.c;Middlewares/ST/netxduo/common/src/nx_icmp_interface_ping6.c;Middlewares/ST/netxduo/common/src/nx_icmp_packet_process.c;Middlewares/ST/netxduo/common/src/nx_icmp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_icmp_ping.c;Middlewares/ST/netxduo/common/src/nx_icmp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_packet_process.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_process_echo_reply.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_process_echo_request.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_send_error_message.c;Middlewares/ST/netxduo/common/src/nx_igmp_enable.c;Middlewares/ST/netxduo/common/src/nx_igmp_info_get.c;Middlewares/ST/netxduo/common/src/nx_igmp_interface_report_send.c;Middlewares/ST/netxduo/common/src/nx_igmp_loopback_disable.c;Middlewares/ST/netxduo/common/src/nx_igmp_loopback_enable.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_check.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_join_internal.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_leave_internal.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_join.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_leave.c;Middlewares/ST/netxduo/common/src/nx_igmp_packet_process.c;Middlewares/ST/netxduo/common/src/nx_igmp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_igmp_periodic_processing.c;Middlewares/ST/netxduo/common/src/nx_igmp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_invalidate_destination_entry.c;Middlewares/ST/netxduo/common/src/nx_ip_address_change_notify.c;Middlewares/ST/netxduo/common/src/nx_ip_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_auxiliary_packet_pool_set.c;Middlewares/ST/netxduo/common/src/nx_ip_checksum_compute.c;Middlewares/ST/netxduo/common/src/nx_ip_create.c;Middlewares/ST/netxduo/common/src/nx_ip_deferred_link_status_process.c;Middlewares/ST/netxduo/common/src/nx_ip_delete.c;Middlewares/ST/netxduo/common/src/nx_ip_delete_queue_clear.c;Middlewares/ST/netxduo/common/src/nx_ip_dispatch_process.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_deferred_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_deferred_processing.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_direct_command.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_interface_direct_command.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_link_status_event.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ip_fast_periodic_timer_entry.c;Middlewares/ST/netxduo/common/src/nx_ip_forward_packet_process.c;Middlewares/ST/netxduo/common/src/nx_ip_forwarding_disable.c;Middlewares/ST/netxduo/common/src/nx_ip_forwarding_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_assembly.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_disable.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_forward_packet.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_packet.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_timeout_check.c;Middlewares/ST/netxduo/common/src/nx_ip_gateway_address_clear.c;Middlewares/ST/netxduo/common/src/nx_ip_gateway_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_gateway_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_header_add.c;Middlewares/ST/netxduo/common/src/nx_ip_info_get.c;Middlewares/ST/netxduo/common/src/nx_ip_initialize.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_address_mapping_configure.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_attach.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_capability_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_capability_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_detach.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_info_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_mtu_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_physical_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_physical_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_status_check.c;Middlewares/ST/netxduo/common/src/nx_ip_link_status_change_notify_set.c;Middlewares/ST/netxduo/common/src/nx_ip_max_payload_size_find.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_checksum_compute.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ip_periodic_timer_entry.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_cleanup.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_disable.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_filter_set.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_processing.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nx_ip_route_find.c;Middlewares/ST/netxduo/common/src/nx_ip_static_route_add.c;Middlewares/ST/netxduo/common/src/nx_ip_static_route_delete.c;Middlewares/ST/netxduo/common/src/nx_ip_status_check.c;Middlewares/ST/netxduo/common/src/nx_ip_thread_entry.c;Middlewares/ST/netxduo/common/src/nx_ipv4_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nx_ipv4_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nx_ipv4_option_process.c;Middlewares/ST/netxduo/common/src/nx_ipv4_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_md5.c;Middlewares/ST/netxduo/common/src/nx_packet_allocate.c;Middlewares/ST/netxduo/common/src/nx_packet_copy.c;Middlewares/ST/netxduo/common/src/nx_packet_data_adjust.c;Middlewares/ST/netxduo/common/src/nx_packet_data_append.c;Middlewares/ST/netxduo/common/src/nx_packet_data_extract_offset.c;Middlewares/ST/netxduo/common/src/nx_packet_data_retrieve.c;Middlewares/ST/netxduo/common/src/nx_packet_debug_info_get.c;Middlewares/ST/netxduo/common/src/nx_packet_length_get.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_cleanup.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_create.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_delete.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_info_get.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_initialize.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_low_watermark_set.c;Middlewares/ST/netxduo/common/src/nx_packet_release.c;Middlewares/ST/netxduo/common/src/nx_packet_transmit_release.c;Middlewares/ST/netxduo/common/src/nx_rarp_disable.c;Middlewares/ST/netxduo/common/src/nx_rarp_enable.c;Middlewares/ST/netxduo/common/src/nx_rarp_info_get.c;Middlewares/ST/netxduo/common/src/nx_rarp_packet_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_rarp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_rarp_packet_send.c;Middlewares/ST/netxduo/common/src/nx_rarp_periodic_update.c;Middlewares/ST/netxduo/common/src/nx_rarp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_system_initialize.c;Middlewares/ST/netxduo/common/src/nx_tcp_cleanup_deferred.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_bind_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_bind.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_port_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_unbind.c;Middlewares/ST/netxduo/common/src/nx_tcp_connect_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_deferred_cleanup_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_disconnect_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_enable.c;Middlewares/ST/netxduo/common/src/nx_tcp_fast_periodic_processing.c;Middlewares/ST/netxduo/common/src/nx_tcp_free_port_find.c;Middlewares/ST/netxduo/common/src/nx_tcp_info_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_initialize.c;Middlewares/ST/netxduo/common/src/nx_tcp_mss_option_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_no_connection_reset.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_process.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_ack.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_control.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_fin.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_probe.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_rst.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_syn.c;Middlewares/ST/netxduo/common/src/nx_tcp_periodic_processing.c;Middlewares/ST/netxduo/common/src/nx_tcp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_tcp_receive_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_accept.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_listen.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_relisten.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_unaccept.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_unlisten.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_block_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_connection_reset.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_create.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_delete.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_disconnect.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_disconnect_complete_notify.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_establish_notify.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_mss_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_mss_peer_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_mss_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_packet_process.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_queue_depth_notify_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive_queue_flush.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_retransmit.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_send.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_send_internal.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_ack_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_closing.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_data_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_established.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_fin_wait1.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_fin_wait2.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_last_ack.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_syn_received.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_syn_sent.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_transmit_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_wait.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_thread_resume.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_thread_suspend.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_timed_wait_callback.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_transmit_configure.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_transmit_queue_flush.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_window_update_notify_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_transmit_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_window_scaling_option_get.c;Middlewares/ST/netxduo/common/src/nx_udp_bind_cleanup.c;Middlewares/ST/netxduo/common/src/nx_udp_enable.c;Middlewares/ST/netxduo/common/src/nx_udp_free_port_find.c;Middlewares/ST/netxduo/common/src/nx_udp_info_get.c;Middlewares/ST/netxduo/common/src/nx_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nx_udp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_udp_receive_cleanup.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_bind.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_checksum_disable.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_checksum_enable.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_create.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_delete.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_port_get.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_receive.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_unbind.c;Middlewares/ST/netxduo/common/src/nx_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nx_utility.c;Middlewares/ST/netxduo/common/src/nxd_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxd_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxd_icmp_source_ping.c;Middlewares/ST/netxduo/common/src/nxd_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxd_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxd_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxd_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxd_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxd_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxd_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxd_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nxde_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxde_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxde_icmp_source_ping.c;Middlewares/ST/netxduo/common/src/nxde_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxde_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxde_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxde_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxde_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxde_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxde_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxde_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nxe_arp_dynamic_entries_invalidate.c;Middlewares/ST/netxduo/common/src/nxe_arp_dynamic_entry_set.c;Middlewares/ST/netxduo/common/src/nxe_arp_enable.c;Middlewares/ST/netxduo/common/src/nxe_arp_entry_delete.c;Middlewares/ST/netxduo/common/src/nxe_arp_gratuitous_send.c;Middlewares/ST/netxduo/common/src/nxe_arp_hardware_address_find.c;Middlewares/ST/netxduo/common/src/nxe_arp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_arp_ip_address_find.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entries_delete.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entry_create.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entry_delete.c;Middlewares/ST/netxduo/common/src/nxe_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxe_icmp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxe_igmp_enable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_igmp_loopback_disable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_loopback_enable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_join.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_leave.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_change_notify.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_auxiliary_packet_pool_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_create.c;Middlewares/ST/netxduo/common/src/nxe_ip_delete.c;Middlewares/ST/netxduo/common/src/nxe_ip_driver_direct_command.c;Middlewares/ST/netxduo/common/src/nxe_ip_driver_interface_direct_command.c;Middlewares/ST/netxduo/common/src/nxe_ip_forwarding_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_forwarding_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_fragment_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_fragment_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_clear.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_info_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_mapping_configure.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_attach.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_capability_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_capability_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_detach.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_info_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_mtu_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_physical_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_physical_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_status_check.c;Middlewares/ST/netxduo/common/src/nxe_ip_link_status_change_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_max_payload_size_find.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_filter_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_receive.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_static_route_add.c;Middlewares/ST/netxduo/common/src/nxe_ip_static_route_delete.c;Middlewares/ST/netxduo/common/src/nxe_ip_status_check.c;Middlewares/ST/netxduo/common/src/nxe_ipv4_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxe_ipv4_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxe_packet_allocate.c;Middlewares/ST/netxduo/common/src/nxe_packet_copy.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_append.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_extract_offset.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_retrieve.c;Middlewares/ST/netxduo/common/src/nxe_packet_length_get.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_create.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_delete.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_info_get.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_low_watermark_set.c;Middlewares/ST/netxduo/common/src/nxe_packet_release.c;Middlewares/ST/netxduo/common/src/nxe_packet_transmit_release.c;Middlewares/ST/netxduo/common/src/nxe_rarp_disable.c;Middlewares/ST/netxduo/common/src/nxe_rarp_enable.c;Middlewares/ST/netxduo/common/src/nxe_rarp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_bind.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_port_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_unbind.c;Middlewares/ST/netxduo/common/src/nxe_tcp_enable.c;Middlewares/ST/netxduo/common/src/nxe_tcp_free_port_find.c;Middlewares/ST/netxduo/common/src/nxe_tcp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_accept.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_listen.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_relisten.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_unaccept.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_unlisten.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_create.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_delete.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_disconnect.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_disconnect_complete_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_establish_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_peer_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_queue_depth_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_send.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_state_wait.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_timed_wait_callback.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_transmit_configure.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_window_update_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_udp_enable.c;Middlewares/ST/netxduo/common/src/nxe_udp_free_port_find.c;Middlewares/ST/netxduo/common/src/nxe_udp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_bind.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_checksum_disable.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_checksum_enable.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_create.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_delete.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_port_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_receive.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_unbind.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_packet_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_packet_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nx_icmp_ping6.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_DAD_clear_NDCache_entry.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_DAD_failure.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_dest_table_add.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_dest_table_find.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_destination_table_periodic_update.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_packet_process.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_perform_DAD.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_echo_reply.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_echo_request.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_na.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_ns.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_packet_too_big.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_ra.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_redirect.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_error_message.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_ns.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_queued_packets.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_rs.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_neighbor_message.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_options.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_ra.c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ares\ST\threadx\common\src\tx_byte_pool_search.c;..\Middlewares\ST\threadx\common\src\tx_byte_release.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_create.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_delete.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_get.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_info_get.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_initialize.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_set.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_set_notify.c;..\Middlewares\ST\threadx\common\src\tx_mutex_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_mutex_create.c;..\Middlewares\ST\threadx\common\src\tx_mutex_delete.c;..\Middlewares\ST\threadx\common\src\tx_mutex_get.c;..\Middlewares\ST\threadx\common\src\tx_mutex_info_get.c;..\Middlewares\ST\threadx\common\src\tx_mutex_initialize.c;..\Middlewares\ST\threadx\common\src\tx_mutex_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_mutex_priority_change.c;..\Middlewares\ST\threadx\common\src\tx_mutex_put.c;..\Middlewares\ST\threadx\common\src\tx_queue_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_queue_create.c;..\Middlewares\ST\threadx\common\src\tx_queue_delete.c;..\Middlewares\ST\threadx\common\src\tx_queue_flush.c;..\Middlewares\ST\threadx\common\src\tx_queue_front_send.c;..\Middlewares\ST\threadx\common\src\tx_queue_info_get.c;..\Middlewares\ST\threadx\common\src\tx_queue_initialize.c;..\Middlewares\ST\threadx\common\src\tx_queue_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_queue_receive.c;..\Middlewares\ST\threadx\common\src\tx_queue_send.c;..\Middlewares\ST\threadx\common\src\tx_queue_send_notify.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_ceiling_put.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_create.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_delete.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_get.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_info_get.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_initialize.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_put.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_put_notify.c;..\Middlewares\ST\threadx\common\src\tx_thread_create.c;..\Middlewares\ST\threadx\common\src\tx_thread_delete.c;..\Middlewares\ST\threadx\common\src\tx_thread_entry_exit_notify.c;..\Middlewares\ST\threadx\common\src\tx_thread_identify.c;..\Middlewares\ST\threadx\common\src\tx_thread_info_get.c;..\Middlewares\ST\threadx\common\src\tx_thread_initialize.c;..\Middlewares\ST\threadx\common\src\tx_thread_preemption_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_priority_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_relinquish.c;..\Middlewares\ST\threadx\common\src\tx_thread_reset.c;..\Middlewares\ST\threadx\common\src\tx_thread_resume.c;..\Middlewares\ST\threadx\common\src\tx_thread_shell_entry.c;..\Middlewares\ST\threadx\common\src\tx_thread_sleep.c;..\Middlewares\ST\threadx\common\src\tx_thread_stack_analyze.c;..\Middlewares\ST\threadx\common\src\tx_thread_suspend.c;..\Middlewares\ST\threadx\common\src\tx_thread_system_preempt_check.c;..\Middlewares\ST\threadx\common\src\tx_thread_system_suspend.c;..\Middlewares\ST\threadx\common\src\tx_thread_terminate.c;..\Middlewares\ST\threadx\common\src\tx_thread_time_slice.c;..\Middlewares\ST\threadx\common\src\tx_thread_time_slice_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_timeout.c;..\Middlewares\ST\threadx\common\src\tx_thread_wait_abort.c;..\Middlewares\ST\threadx\common\src\tx_time_get.c;..\Middlewares\ST\threadx\common\src\tx_time_set.c;..\Middlewares\ST\threadx\common\src\txe_block_allocate.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_create.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_delete.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_info_get.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_block_release.c;..\Middlewares\ST\threadx\common\src\txe_byte_allocate.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_create.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_delete.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_info_get.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_byte_release.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_create.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_delete.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_get.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_info_get.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_set.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_set_notify.c;..\Middlewares\ST\threadx\common\src\txe_mutex_create.c;..\Middlewares\ST\threadx\common\src\txe_mutex_delete.c;..\Middlewares\ST\threadx\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@@ -8,7 +8,7 @@ CDefines=TX_INCLUDE_USER_DEFINE_FILE;TX_SINGLE_MODE_NON_SECURE:1;USE_HAL_DRIVER;
 ADefines=TX_SINGLE_MODE_NON_SECURE:1;
 
 [PreviousUsedCMakes]
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s/ST/netxduo/common/src/nx_tcp_socket_window_update_notify_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_transmit_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_window_scaling_option_get.c;Middlewares/ST/netxduo/common/src/nx_udp_bind_cleanup.c;Middlewares/ST/netxduo/common/src/nx_udp_enable.c;Middlewares/ST/netxduo/common/src/nx_udp_free_port_find.c;Middlewares/ST/netxduo/common/src/nx_udp_info_get.c;Middlewares/ST/netxduo/common/src/nx_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nx_udp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_udp_receive_cleanup.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_bind.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_checksum_disable.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_checksum_enable.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_create.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_delete.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_port_get.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_receive.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_unbind.c;Middlewares/ST/netxduo/common/src/nx_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nx_utility.c;Middlewares/ST/netxduo/common/src/nxd_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxd_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxd_icmp_source_ping.c;Middlewares/ST/netxduo/common/src/nxd_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxd_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxd_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxd_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxd_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxd_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxd_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxd_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nxde_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxde_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxde_icmp_source_ping.c;Middlewares/ST/netxduo/common/src/nxde_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxde_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxde_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxde_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxde_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxde_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxde_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxde_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nxe_arp_dynamic_entries_invalidate.c;Middlewares/ST/netxduo/common/src/nxe_arp_dynamic_entry_set.c;Middlewares/ST/netxduo/common/src/nxe_arp_enable.c;Middlewares/ST/netxduo/common/src/nxe_arp_entry_delete.c;Middlewares/ST/netxduo/common/src/nxe_arp_gratuitous_send.c;Middlewares/ST/netxduo/common/src/nxe_arp_hardware_address_find.c;Middlewares/ST/netxduo/common/src/nxe_arp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_arp_ip_address_find.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entries_delete.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entry_create.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entry_delete.c;Middlewares/ST/netxduo/common/src/nxe_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxe_icmp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxe_igmp_enable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_igmp_loopback_disable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_loopback_enable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_join.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_leave.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_change_notify.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_auxiliary_packet_pool_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_create.c;Middlewares/ST/netxduo/common/src/nxe_ip_delete.c;Middlewares/ST/netxduo/common/src/nxe_ip_driver_direct_command.c;Middlewares/ST/netxduo/common/src/nxe_ip_driver_interface_direct_command.c;Middlewares/ST/netxduo/common/src/nxe_ip_forwarding_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_forwarding_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_fragment_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_fragment_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_clear.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_info_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_mapping_configure.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_attach.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_capability_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_capability_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_detach.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_info_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_mtu_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_physical_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_physical_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_status_check.c;Middlewares/ST/netxduo/common/src/nxe_ip_link_status_change_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_max_payload_size_find.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_filter_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_receive.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_static_route_add.c;Middlewares/ST/netxduo/common/src/nxe_ip_static_route_delete.c;Middlewares/ST/netxduo/common/src/nxe_ip_status_check.c;Middlewares/ST/netxduo/common/src/nxe_ipv4_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxe_ipv4_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxe_packet_allocate.c;Middlewares/ST/netxduo/common/src/nxe_packet_copy.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_append.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_extract_offset.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_retrieve.c;Middlewares/ST/netxduo/common/src/nxe_packet_length_get.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_create.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_delete.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_info_get.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_low_watermark_set.c;Middlewares/ST/netxduo/common/src/nxe_packet_release.c;Middlewares/ST/netxduo/common/src/nxe_packet_transmit_release.c;Middlewares/ST/netxduo/common/src/nxe_rarp_disable.c;Middlewares/ST/netxduo/common/src/nxe_rarp_enable.c;Middlewares/ST/netxduo/common/src/nxe_rarp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_bind.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_port_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_unbind.c;Middlewares/ST/netxduo/common/src/nxe_tcp_enable.c;Middlewares/ST/netxduo/common/src/nxe_tcp_free_port_find.c;Middlewares/ST/netxduo/common/src/nxe_tcp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_accept.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_listen.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_relisten.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_unaccept.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_unlisten.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_create.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_delete.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_disconnect.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_disconnect_complete_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_establish_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_peer_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_queue_depth_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_send.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_state_wait.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_timed_wait_callback.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_transmit_configure.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_window_update_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_udp_enable.c;Middlewares/ST/netxduo/common/src/nxe_udp_free_port_find.c;Middlewares/ST/netxduo/common/src/nxe_udp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nx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iddlewares/ST/netxduo/common/src/nx_tcp_socket_send.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_send_internal.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_ack_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_closing.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_data_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_established.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_fin_wait1.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_fin_wait2.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_last_ack.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_syn_received.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_syn_sent.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_transmit_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_wait.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_thread_resume.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_thread_suspend.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_timed_wait_callback.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_transmit_configure.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_transmit_queue_flush.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_window_update_notify_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_transmit_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_window_scaling_option_get.c;Middlewares/ST/netxduo/common/src/nx_udp_bind_cleanup.c;Middlewares/ST/netxduo/common/src/nx_udp_enable.c;Middlewares/ST/netxduo/common/src/nx_udp_free_port_find.c;Middlewares/ST/netxduo/common/src/nx_udp_info_get.c;Middlewares/ST/netxduo/common/src/nx_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nx_udp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_udp_receive_cleanup.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_bind.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_checksum_disable.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_checksum_enable.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_create.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_delete.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_port_get.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_receive.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_unbind.c;Middlewares/ST/netxduo/common/src/nx_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nx_utility.c;Middlewares/ST/netxduo/common/src/nxd_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxd_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxd_icmp_source_ping.c;Middlewares/ST/netxduo/common/src/nxd_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxd_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxd_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxd_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxd_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxd_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxd_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxd_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nxde_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxde_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxde_icmp_source_ping.c;Middlewares/ST/netxduo/common/src/nxde_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxde_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxde_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxde_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxde_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxde_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxde_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxde_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nxe_arp_dynamic_entries_invalidate.c;Middlewares/ST/netxduo/common/src/nxe_arp_dynamic_entry_set.c;Middlewares/ST/netxduo/common/src/nxe_arp_enable.c;Middlewares/ST/netxduo/common/src/nxe_arp_entry_delete.c;Middlewares/ST/netxduo/common/src/nxe_arp_gratuitous_send.c;Middlewares/ST/netxduo/common/src/nxe_arp_hardware_address_find.c;Middlewares/ST/netxduo/common/src/nxe_arp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_arp_ip_address_find.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entries_delete.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entry_create.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entry_delete.c;Middlewares/ST/netxduo/common/src/nxe_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxe_icmp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxe_igmp_enable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_igmp_loopback_disable.c;Midd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stablish_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_peer_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_queue_depth_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_send.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_state_wait.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_timed_wait_callback.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_transmit_configure.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_window_update_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_udp_enable.c;Middlewares/ST/netxduo/common/src/nxe_udp_free_port_find.c;Middlewares/ST/netxduo/common/src/nxe_udp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_bind.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_checksum_disable.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_checksum_enable.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_create.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_delete.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_port_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_receive.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_unbind.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_packet_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_packet_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nx_icmp_ping6.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_DAD_clear_NDCache_entry.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_DAD_failure.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_dest_table_add.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_dest_table_find.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_destination_table_periodic_update.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_packet_process.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_perform_DAD.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_echo_reply.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_echo_request.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_na.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_ns.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_packet_too_big.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_ra.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_redirect.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_error_message.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_ns.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_queued_packets.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_rs.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_neighbor_message.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_options.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_ra.c;Middlewares/ST/netxduo/common/src/nx_ipv6_fragment_process.c;Middlewares/ST/netxduo/common/src/nx_ipv6_header_add.c;Middlewares/ST/netxduo/common/src/nx_ipv6_multicast_join.c;Middlewares/ST/netxduo/common/src/nx_ipv6_multicast_leave.c;Middlewares/ST/netxduo/common/src/nx_ipv6_option_error.c;Middlewares/ST/netxduo/common/src/nx_ipv6_packet_copy.c;Middlewares/ST/netxduo/common/src/nx_ipv6_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_ipv6_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ipv6_prefix_list_add_entry.c;Middlewares/ST/netxduo/common/src/nx_ipv6_prefix_list_delete.c;Middlewares/ST/netxduo/common/src/nx_ipv6_prefix_list_delete_entry.c;Middlewares/ST/netxduo/common/src/nx_ipv6_process_fragment_option.c;Middlewares/ST/netxduo/common/src/nx_ipv6_process_hop_by_hop_option.c;Middlewares/ST/netxduo/common/src/nx_ipv6_process_routing_option.c;Middlewares/ST/netxduo/common/src/nx_ipv6_util.c;Middlewares/ST/netxduo/common/src/nx_link.c;Middlewares/ST/netxduo/common/src/nxd_icmpv6_ra_flag_callback_set.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_change_notify.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_delete.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_set.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_add.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_add_internal.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_delete.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_entry_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_number_of_entries_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_table_init.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_destination_table_find_next_hop.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_disable.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_enable.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_find_default_router_from_address.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_find_max_prefix_length.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_interface_find.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_prefix_router_timer_tick.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_raw_packet_send_internal.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_router_lookup.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_router_solicitation_check.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_search_onlink.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_stateless_address_autoconfig_disable.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_stateless_address_autoconfig_enable.c;Middlewares/ST/netxduo/common/src/nxde_icmpv6_ra_flag_callback_set.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_change_notify.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_delete.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_set.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_add.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_delete.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_entry_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_number_of_entries_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_disable.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_enable.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_stateless_address_autoconfig_disable.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_stateless_address_autoconfig_enable.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_entry_delete.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_entry_set.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_hardware_address_find.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_invalidate.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_ip_address_find.c;Middlewares/ST/netxduo/common/src/nx_http_proxy_client.c;Middlewares/ST/threadx/common/src/tx_initialize_high_level.c;Middlewares/ST/threadx/common/src/tx_initialize_kernel_enter.c;Middlewares/ST/threadx/common/src/tx_initialize_kernel_setup.c;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_context_restore.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_context_save.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_interrupt_control.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_interrupt_disable.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_interrupt_restore.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_schedule.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_stack_build.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_system_return.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_timer_interrupt.S;Middlewares/ST/threadx/common/src/tx_thread_stack_error_handler.c;Middlewares/ST/threadx/common/src/tx_thread_stack_error_notify.c;Middlewares/ST/threadx/common/src/tx_thread_system_resume.c;Middlewares/ST/threadx/common/src/tx_block_allocate.c;Middlewares/ST/threadx/common/src/tx_block_pool_cleanup.c;Middlewares/ST/threadx/common/src/tx_block_pool_create.c;Middlewares/ST/threadx/common/src/tx_block_pool_delete.c;Middlewares/ST/threadx/common/src/tx_block_pool_info_get.c;Middlewares/ST/threadx/common/src/tx_block_pool_initialize.c;Middlewares/ST/threadx/common/src/tx_block_pool_prioritize.c;Middlewares/ST/threadx/common/src/tx_block_release.c;Middlewares/ST/threadx/common/src/tx_byte_allocate.c;Middlewares/ST/threadx/common/src/tx_byte_pool_cleanup.c;Middlewares/ST/threadx/common/src/tx_byte_pool_create.c;Middlewares/ST/threadx/common/src/tx_byte_pool_delete.c;Middlewares/ST/threadx/common/src/tx_byte_pool_info_get.c;Middlewares/ST/threadx/common/src/tx_byte_pool_initialize.c;Middlewares/ST/threadx/common/src/tx_byte_pool_prioritize.c;Middlewares/ST/threadx/common/src/tx_byte_pool_search.c;Middlewares/ST/threadx/common/src/tx_byte_release.c;Middlewares/ST/threadx/common/src/tx_event_flags_cleanup.c;Middlewares/ST/threadx/common/src/tx_event_flags_create.c;Middlewares/ST/threadx/common/src/tx_event_flags_delete.c;Middlewares/ST/threadx/common/src/tx_event_flags_get.c;Middlewares/ST/threadx/common/src/tx_event_flags_info_get.c;Middlewares/ST/threadx/common/src/tx_event_flags_initialize.c;Middlewares/ST/threadx/common/src/tx_event_flags_set.c;Middlewares/ST/threadx/common/src/tx_event_flags_set_notify.c;Middlewares/ST/threadx/common/src/tx_mutex_cleanup.c;Middlewares/ST/threadx/common/src/tx_mutex_create.c;Middlewares/ST/threadx/common/src/tx_mutex_delete.c;Middlewares/ST/threadx/common/src/tx_mutex_get.c;Middlewares/ST/threadx/common/src/tx_mutex_info_get.c;Middlewares/ST/threadx/common/src/tx_mutex_initialize.c;Middlewares/ST/threadx/common/src/tx_mutex_prioritize.c;Middlewares/ST/threadx/common/src/tx_mutex_priority_change.c;Middlewares/ST/threadx/common/src/tx_mutex_put.c;Middlewares/ST/threadx/common/src/tx_queue_cleanup.c;Middlewares/ST/threadx/common/src/tx_queue_create.c;Middlewares/ST/threadx/common/src/tx_queue_delete.c;Middlewares/ST/threadx/common/src/tx_queue_flush.c;Middlewares/ST/threadx/common/src/tx_queue_front_send.c;Middlewares/ST/threadx/common/src/tx_queue_info_get.c;Middlewares/ST/threadx/common/src/tx_queue_initialize.c;Middlewares/ST/threadx/common/src/tx_queue_prioritize.c;Middlewares/ST/threadx/common/src/tx_queue_receive.c;Middlewares/ST/threadx/common/src/tx_queue_send.c;Middlewares/ST/threadx/common/src/tx_queue_send_notify.c;Middlewares/ST/threadx/common/src/tx_semaphore_ceiling_put.c;Middlewares/ST/threadx/common/src/tx_semaphore_cleanup.c;Middlewares/ST/threadx/common/src/tx_semaphore_create.c;Middlewares/ST/threadx/common/src/tx_semaphore_delete.c;Middlewares/ST/threadx/common/src/tx_semaphore_get.c;Middlewares/ST/threadx/common/src/tx_semaphore_info_get.c;Middlewares/ST/threadx/common/src/tx_semaphore_initialize.c;Middlewares/ST/threadx/common/src/tx_semaphore_prioritize.c;Middlewares/ST/threadx/common/src/tx_semaphore_put.c;Middlewares/ST/threadx/common/src/tx_semaphore_put_notify.c;Middlewares/ST/threadx/common/src/tx_thread_create.c;Middlewares/ST/threadx/common/src/tx_thread_delete.c;Middlewares/ST/threadx/common/src/tx_thread_entry_exit_notify.c;Middlewares/ST/threadx/common/src/tx_thread_identify.c;Middlewares/ST/threadx/common/src/tx_thread_info_get.c;Middlewares/ST/threadx/common/src/tx_thread_initialize.c;Middlewares/ST/threadx/common/src/tx_thread_preemption_change.c;Middlewares/ST/threadx/common/src/tx_thread_priority_change.c;Middlewares/ST/threadx/common/src/tx_thread_relinquish.c;Middlewares/ST/threadx/common/src/tx_thread_reset.c;Middlewares/ST/threadx/common/src/tx_thread_resume.c;Middlewares/ST/threadx/common/src/tx_thread_shell_entry.c;Middlewares/ST/threadx/common/src/tx_thread_sleep.c;Middlewares/ST/threadx/common/src/tx_thread_stack_analyze.c;Middlewares/ST/threadx/common/src/tx_thread_suspend.c;Middlewares/ST/threadx/common/src/tx_thread_system_preempt_check.c;Middlewares/ST/threadx/common/src/tx_thread_system_suspend.c;Middlewares/ST/threadx/common/src/tx_thread_terminate.c;Middlewares/ST/threadx/common/src/tx_thread_time_slice.c;Middlewares/ST/threadx/common/src/tx_thread_time_slice_change.c;Middlewares/ST/threadx/common/src/tx_thread_timeout.c;Middlewares/ST/threadx/common/src/tx_thread_wait_abort.c;Middlewares/ST/threadx/common/src/tx_time_get.c;Middlewares/ST/threadx/common/src/tx_time_set.c;Middlewares/ST/threadx/common/src/txe_block_allocate.c;Middlewares/ST/threadx/common/src/txe_block_pool_create.c;Middlewares/ST/threadx/common/src/txe_block_pool_delete.c;Middlewares/ST/threadx/common/src/txe_block_pool_info_get.c;Middlewares/ST/threadx/common/src/txe_block_pool_prioritize.c;Middlewares/ST/threadx/common/src/txe_block_release.c;Middlewares/ST/threadx/common/src/txe_byte_allocate.c;Middlewares/ST/threadx/common/src/txe_byte_pool_create.c;Middlewares/ST/threadx/common/src/txe_byte_pool_delete.c;Middlewares/ST/threadx/common/src/txe_byte_pool_info_get.c;Middlewares/ST/threadx/common/src/txe_byte_pool_prioritize.c;Middlewares/ST/threadx/common/src/txe_byte_release.c;Middlewares/ST/threadx/common/src/txe_event_flags_create.c;Middlewares/ST/threadx/common/src/txe_event_flags_delete.c;Middlewares/ST/threadx/common/src/txe_event_flags_get.c;Middlewares/ST/threadx/common/src/txe_event_flags_info_get.c;Middlewares/ST/threadx/common/src/txe_event_flags_set.c;Middlewares/ST/threadx/common/src/txe_event_flags_set_notify.c;Middlewares/ST/threadx/common/src/txe_mutex_create.c;Middlewares/ST/threadx/common/src/txe_mutex_delete.c;Middlewares/ST/threadx/common/src/txe_mutex_get.c;Middlewares/ST/threadx/common/src/txe_mutex_info_get.c;Middlewares/ST/threadx/common/src/txe_mutex_prioritize.c;Middlewares/ST/threadx/common/src/txe_mutex_put.c;Middlewares/ST/threadx/common/src/txe_queue_create.c;Middlewares/ST/threadx/common/src/txe_queue_delete.c;Middlewares/ST/threadx/common/src/txe_queue_flush.c;Middlewares/ST/threadx/common/src/txe_queue_front_send.c;Middlewares/ST/threadx/common/src/txe_queue_info_get.c;Middlewares/ST/threadx/common/src/txe_queue_prioritize.c;Middlewares/ST/threadx/common/src/txe_queue_receive.c;Middlewares/ST/threadx/common/src/txe_queue_send.c;Middlewares/ST/threadx/common/src/txe_queue_send_notify.c;Middlewares/ST/threadx/common/src/txe_semaphore_ceiling_put.c;Middlewares/ST/threadx/common/src/txe_semaphore_create.c;Middlewares/ST/threadx/common/src/txe_semaphore_delete.c;Middlewares/ST/threadx/common/src/txe_semaphore_get.c;Middlewares/ST/threadx/common/src/txe_semaphore_info_get.c;Middlewares/ST/threadx/common/src/txe_semaphore_prioritize.c;Middlewares/ST/threadx/common/src/txe_semaphore_put.c;Middlewares/ST/threadx/common/src/txe_semaphore_put_notify.c;Middlewares/ST/threadx/common/src/txe_thread_create.c;Middlewares/ST/threadx/common/src/txe_thread_delete.c;Middlewares/ST/threadx/common/src/txe_thread_entry_exit_notify.c;Middlewares/ST/threadx/common/src/txe_thread_info_get.c;Middlewares/ST/threadx/common/src/txe_thread_preemption_change.c;Middlewares/ST/threadx/common/src/txe_thread_priority_change.c;Middlewares/ST/threadx/common/src/txe_thread_relinquish.c;Middlewares/ST/threadx/common/src/txe_thread_reset.c;Middlewares/ST/threadx/common/src/txe_thread_resume.c;Middlewares/ST/threadx/common/src/txe_thread_suspend.c;Middlewares/ST/threadx/common/src/txe_thread_terminate.c;Middlewares/ST/threadx/common/src/txe_thread_time_slice_change.c;Middlewares/ST/threadx/common/src/txe_thread_wait_abort.c;Middlewares/ST/threadx/common/src/tx_timer_activate.c;Middlewares/ST/threadx/common/src/tx_timer_change.c;Middlewares/ST/threadx/common/src/tx_timer_create.c;Middlewares/ST/threadx/common/src/tx_timer_deactivate.c;Middlewares/ST/threadx/common/src/tx_timer_delete.c;Middlewares/ST/threadx/common/src/tx_timer_expiration_process.c;Middlewares/ST/threadx/common/src/tx_timer_info_get.c;Middlewares/ST/threadx/common/src/tx_timer_initialize.c;Middlewares/ST/threadx/common/src/tx_timer_system_activate.c;Middlewares/ST/threadx/common/src/tx_timer_system_deactivate.c;Middlewares/ST/threadx/common/src/tx_timer_thread_entry.c;Middlewares/ST/threadx/common/src/txe_timer_activate.c;Middlewares/ST/threadx/common/src/txe_timer_change.c;Middlewares/ST/threadx/common/src/txe_timer_create.c;Middlewares/ST/threadx/common/src/txe_timer_deactivate.c;Middlewares/ST/threadx/common/src/txe_timer_delete.c;Middlewares/ST/threadx/common/src/txe_timer_info_get.c;Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/system_stm32h5xx.c;Core/Src/system_stm32h5xx.c;;;
 HeaderPath=Drivers/STM32H5xx_HAL_Driver/Inc;Drivers/STM32H5xx_HAL_Driver/Inc/Legacy;Middlewares/ST/threadx/common/inc;Drivers/CMSIS/Device/ST/STM32H5xx/Include;Middlewares/ST/netxduo/common/inc;Middlewares/ST/netxduo/ports/cortex_m33/gnu/inc;Middlewares/ST/threadx/ports/cortex_m33/gnu/inc;Drivers/CMSIS/Include;NetXDuo/App;Core/Inc;AZURE_RTOS/App;
 CDefines=NX_INCLUDE_USER_DEFINE_FILE;TX_INCLUDE_USER_DEFINE_FILE;TX_SINGLE_MODE_NON_SECURE:1;USE_HAL_DRIVER;STM32H563xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
 ADefines=TX_SINGLE_MODE_NON_SECURE:1;
diff --git a/CMakeLists.txt b/CMakeLists.txt
index aca9401..77fa471 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -1,112 +1,113 @@
-cmake_minimum_required(VERSION 3.22)
-
-#
-# This file is generated only once,
-# and is not re-generated if converter is called multiple times.
-#
-# User is free to modify the file as much as necessary
-#
-
-# Setup compiler settings
-set(CMAKE_C_STANDARD 11)
-set(CMAKE_C_STANDARD_REQUIRED ON)
-set(CMAKE_C_EXTENSIONS ON)
-set(CMAKE_C_COMPILER "/opt/homebrew/bin/arm-none-eabi-gcc")
-
-
-# Define the build type
-if(NOT CMAKE_BUILD_TYPE)
-    set(CMAKE_BUILD_TYPE "Debug")
-endif()
-
-# Set the project name
-set(CMAKE_PROJECT_NAME Lightning)
-
-
-# Enable compile command to ease indexing with e.g. clangd
-set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)
-
-# Core project settings
-project(${CMAKE_PROJECT_NAME})
-message("Build type: " ${CMAKE_BUILD_TYPE})
-
-# Display ASCII art at start of build
-if(EXISTS "${CMAKE_SOURCE_DIR}/art")
-    file(READ "${CMAKE_SOURCE_DIR}/art" ASCII_ART)
-    message("${ASCII_ART}")
-endif()
-
-# Enable CMake support for ASM and C languages
-enable_language(C ASM)
-
-# Create an executable object type
-add_executable(${CMAKE_PROJECT_NAME})
-
-# Add STM32CubeMX generated sources
-add_subdirectory(cmake/stm32cubemx)
-
-# Link directories setup
-target_link_directories(${CMAKE_PROJECT_NAME} PRIVATE
-    # Add user defined library search paths
-)
-
-# Add sources to executable
-target_sources(${CMAKE_PROJECT_NAME} PRIVATE
-    # Add user sources here
-
-    # ThreadX Utils
-    "./Drivers/Embedded-Base/platforms/stm32h563/src/fdcan.c"
-    "./Drivers/Embedded-Base/threadX/src/u_tx_debug.c"
-    "./Drivers/Embedded-Base/threadX/src/u_tx_mutex.c"
-    "./Drivers/Embedded-Base/threadX/src/u_tx_queues.c"
-    "./Drivers/Embedded-Base/threadX/src/u_tx_threads.c"
-    "./Drivers/Embedded-Base/middleware/src/bitstream.c"
-    "./Drivers/Embedded-Base/middleware/src/c_utils.c"
-
-    # Peripheral Drivers
-    "../Drivers/Embedded-Base/general/include/lsm6dsv_reg.h"
-    "../Drivers/Embedded-Base/general/src/lsm6dsv_reg.c"
-    "./Drivers/Embedded-Base/general/src/as3935.c"
-    "../Drivers/Embedded-Base/general/src/lis2mdl_reg.c"
-
-    # Core
-    "./Core/Src/u_test.c"
-    "./Core/Src/u_inbox.c"
-    "./Core/Src/u_sensors.c"
-    "./Core/Src/u_threads.c"
-    "./Core/Src/u_statemachine.c"
-    "./Core/Src/u_queues.c"
-    "./Core/Src/u_can.c"
-    "./Core/Src/u_mutexes.c"
-
-    # gen
-    "./Core/Src/can_messages_tx.c"
-)
-
-# Add include paths
-target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE
-    # Add user defined include paths
-    "./Drivers/Embedded-Base/general/include/"
-    "./Drivers/Embedded-Base/middleware/include/"
-    "./Drivers/Embedded-Base/platforms/stm32h563/include/"
-    "./Drivers/Embedded-Base/threadX/inc/"
-    "./NetXDuo"
-    "./Core/Inc/"
-)
-
-# Add project symbols (macros)
-target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE
-    # Add user defined symbols
-)
-
-# Compiler options
-target_compile_options(${CMAKE_PROJECT_NAME} PRIVATE
-    -Wno-unused-parameter # u_TODO - this doesn't seem to be working
-)
-
-# Add linked libraries
-target_link_libraries(${CMAKE_PROJECT_NAME}
-    stm32cubemx
-
-    # Add user defined libraries
-)
+cmake_minimum_required(VERSION 3.22)
+
+#
+# This file is generated only once,
+# and is not re-generated if converter is called multiple times.
+#
+# User is free to modify the file as much as necessary
+#
+
+# Setup compiler settings
+set(CMAKE_C_STANDARD 11)
+set(CMAKE_C_STANDARD_REQUIRED ON)
+set(CMAKE_C_EXTENSIONS ON)
+
+
+# Define the build type
+if(NOT CMAKE_BUILD_TYPE)
+    set(CMAKE_BUILD_TYPE "Debug")
+endif()
+
+# Set the project name
+set(CMAKE_PROJECT_NAME Lightning)
+
+
+# Enable compile command to ease indexing with e.g. clangd
+set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)
+
+# Core project settings
+project(${CMAKE_PROJECT_NAME})
+message("Build type: " ${CMAKE_BUILD_TYPE})
+
+# Display ASCII art at start of build
+if(EXISTS "${CMAKE_SOURCE_DIR}/art")
+    file(READ "${CMAKE_SOURCE_DIR}/art" ASCII_ART)
+    message("${ASCII_ART}")
+endif()
+
+# Enable CMake support for ASM and C languages
+enable_language(C ASM)
+
+# Create an executable object type
+add_executable(${CMAKE_PROJECT_NAME})
+
+# Add STM32CubeMX generated sources
+add_subdirectory(cmake/stm32cubemx)
+
+# Link directories setup
+target_link_directories(${CMAKE_PROJECT_NAME} PRIVATE
+    # Add user defined library search paths
+)
+
+# Add sources to executable
+target_sources(${CMAKE_PROJECT_NAME} PRIVATE
+    # Add user sources here
+
+    # ThreadX Utils
+    "./Drivers/Embedded-Base/platforms/stm32h563/src/fdcan.c"
+    "./Drivers/Embedded-Base/threadX/src/u_tx_debug.c"
+    "./Drivers/Embedded-Base/threadX/src/u_tx_mutex.c"
+    "./Drivers/Embedded-Base/threadX/src/u_tx_queues.c"
+    "./Drivers/Embedded-Base/threadX/src/u_tx_threads.c"
+    "./Drivers/Embedded-Base/middleware/src/bitstream.c"
+    "./Drivers/Embedded-Base/middleware/src/c_utils.c"
+
+    # Peripheral Drivers
+    "../Drivers/Embedded-Base/general/include/lsm6dsv_reg.h"
+    "../Drivers/Embedded-Base/general/src/lsm6dsv_reg.c"
+    "./Drivers/Embedded-Base/general/src/as3935.c"
+    "../Drivers/Embedded-Base/general/src/lis2mdl_reg.c"
+
+    # Core
+    "./Core/Src/u_test.c"
+    "./Core/Src/u_inbox.c"
+    "./Core/Src/u_sensors.c"
+    "./Core/Src/u_lights.c"
+    "./Core/Src/u_threads.c"
+    "./Core/Src/u_statemachine.c"
+    "./Core/Src/u_queues.c"
+    "./Core/Src/u_can.c"
+    "./Core/Src/u_mutexes.c"
+
+    # gen
+    "./Core/Src/can_messages_tx.c"
+    "./Core/Src/can_messages_rx.c"
+)
+
+# Add include paths
+target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE
+    # Add user defined include paths
+    "./Drivers/Embedded-Base/general/include/"
+    "./Drivers/Embedded-Base/middleware/include/"
+    "./Drivers/Embedded-Base/platforms/stm32h563/include/"
+    "./Drivers/Embedded-Base/threadX/inc/"
+    "./NetXDuo"
+    "./Core/Inc/"
+)
+
+# Add project symbols (macros)
+target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE
+    # Add user defined symbols
+)
+
+# Compiler options
+target_compile_options(${CMAKE_PROJECT_NAME} PRIVATE
+    -Wno-unused-parameter # u_TODO - this doesn't seem to be working
+)
+
+# Add linked libraries
+target_link_libraries(${CMAKE_PROJECT_NAME}
+    stm32cubemx
+
+    # Add user defined libraries
+)
diff --git a/Core/Inc/can_messages_rx.h b/Core/Inc/can_messages_rx.h
new file mode 100644
index 0000000..a0bbe3e
--- /dev/null
+++ b/Core/Inc/can_messages_rx.h
@@ -0,0 +1,938 @@
+#ifndef _CAN_MSGS_RX_H
+#define _CAN_MSGS_RX_H
+
+/*
+ * This file was autogenerated by the CGEN module of the Odyssey framework.
+ * DO NOT EDIT without also reporting the edit to the Odyssey-Definitions repository to be incorproated into the generator.
+*/
+
+#include <stdbool.h>
+
+#include "u_tx_debug.h"
+#include "u_queues.h"
+#include "c_utils.h"
+#include "fdcan.h"
+#include "bitstream.h"
+
+typedef struct {
+ float temp;
+ float humidity;
+} front_msb_env_t;
+
+void receive_front_msb_env(const can_msg_t *message, front_msb_env_t *front_msb_env);
+
+typedef struct {
+ float x_force;
+ float y_force;
+ float z_force;
+} front_msb_accel_t;
+
+void receive_front_msb_accel(const can_msg_t *message, front_msb_accel_t *front_msb_accel);
+
+typedef struct {
+ float x_deg;
+ float y_deg;
+ float z_deg;
+} front_msb_gyro_t;
+
+void receive_front_msb_gyro(const can_msg_t *message, front_msb_gyro_t *front_msb_gyro);
+
+typedef struct {
+ uint32_t strain1;
+ uint32_t strain2;
+} front_msb_strain_t;
+
+void receive_front_msb_strain(const can_msg_t *message, front_msb_strain_t *front_msb_strain);
+
+typedef struct {
+ float shock1;
+ uint16_t shock1_raw;
+} front_shockpot_t;
+
+void receive_front_shockpot(const can_msg_t *message, front_shockpot_t *front_shockpot);
+
+typedef struct {
+ float rh;
+} front_ride_height_t;
+
+void receive_front_ride_height(const can_msg_t *message, front_ride_height_t *front_ride_height);
+
+typedef struct {
+ float wheel_temp;
+} front_wheel_temp_t;
+
+void receive_front_wheel_temp(const can_msg_t *message, front_wheel_temp_t *front_wheel_temp);
+
+typedef struct {
+ float x_fdeg;
+ float y_fdeg;
+ float z_fdeg;
+} front_msb_orientation_t;
+
+void receive_front_msb_orientation(const can_msg_t *message, front_msb_orientation_t *front_msb_orientation);
+
+typedef struct {
+ float temp;
+ float humidity;
+} back_msb_env_t;
+
+void receive_back_msb_env(const can_msg_t *message, back_msb_env_t *back_msb_env);
+
+typedef struct {
+ float x_force;
+ float y_force;
+ float z_force;
+} back_msb_accel_t;
+
+void receive_back_msb_accel(const can_msg_t *message, back_msb_accel_t *back_msb_accel);
+
+typedef struct {
+ float x_deg;
+ float y_deg;
+ float z_deg;
+} back_msb_gyro_t;
+
+void receive_back_msb_gyro(const can_msg_t *message, back_msb_gyro_t *back_msb_gyro);
+
+typedef struct {
+ uint32_t strain1;
+ uint32_t strain2;
+} back_msb_strain_t;
+
+void receive_back_msb_strain(const can_msg_t *message, back_msb_strain_t *back_msb_strain);
+
+typedef struct {
+ float shock1;
+ uint16_t shock1_raw;
+} back_shockpot_t;
+
+void receive_back_shockpot(const can_msg_t *message, back_shockpot_t *back_shockpot);
+
+typedef struct {
+ float rh;
+} back_ride_height_t;
+
+void receive_back_ride_height(const can_msg_t *message, back_ride_height_t *back_ride_height);
+
+typedef struct {
+ float wheel_temp;
+} back_wheel_temp_t;
+
+void receive_back_wheel_temp(const can_msg_t *message, back_wheel_temp_t *back_wheel_temp);
+
+typedef struct {
+ float x_fdeg;
+ float y_fdeg;
+ float z_fdeg;
+} back_msb_orientation_t;
+
+void receive_back_msb_orientation(const can_msg_t *message, back_msb_orientation_t *back_msb_orientation);
+
+typedef struct {
+ float current_target_ac;
+} ac_current_command_t;
+
+void receive_ac_current_command(const can_msg_t *message, ac_current_command_t *ac_current_command);
+
+typedef struct {
+ float brake_ac_current;
+} brake_current_command_t;
+
+void receive_brake_current_command(const can_msg_t *message, brake_current_command_t *brake_current_command);
+
+typedef struct {
+ float max_current_ac_target;
+} max_ac_current_command_t;
+
+void receive_max_ac_current_command(const can_msg_t *message, max_ac_current_command_t *max_ac_current_command);
+
+typedef struct {
+ float max_ac_brake_current_target;
+} max_ac_brake_current_command_t;
+
+void receive_max_ac_brake_current_command(const can_msg_t *message, max_ac_brake_current_command_t *max_ac_brake_current_command);
+
+typedef struct {
+ float max_dc_current_target;
+} max_dc_current_command_t;
+
+void receive_max_dc_current_command(const can_msg_t *message, max_dc_current_command_t *max_dc_current_command);
+
+typedef struct {
+ float max_dc_brake_current_target;
+} max_dc_brake_current_command_t;
+
+void receive_max_dc_brake_current_command(const can_msg_t *message, max_dc_brake_current_command_t *max_dc_brake_current_command);
+
+typedef struct {
+ uint8_t drive_enable;
+} drive_enable_command_t;
+
+void receive_drive_enable_command(const can_msg_t *message, drive_enable_command_t *drive_enable_command);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} dashboard_efuse_t;
+
+void receive_dashboard_efuse(const can_msg_t *message, dashboard_efuse_t *dashboard_efuse);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} brake_efuse_t;
+
+void receive_brake_efuse(const can_msg_t *message, brake_efuse_t *brake_efuse);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} shutdown_efuse_t;
+
+void receive_shutdown_efuse(const can_msg_t *message, shutdown_efuse_t *shutdown_efuse);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} lv_efuse_t;
+
+void receive_lv_efuse(const can_msg_t *message, lv_efuse_t *lv_efuse);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} radfan_efuse_t;
+
+void receive_radfan_efuse(const can_msg_t *message, radfan_efuse_t *radfan_efuse);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} fanbatt_efuse_t;
+
+void receive_fanbatt_efuse(const can_msg_t *message, fanbatt_efuse_t *fanbatt_efuse);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} pumpone_efuse_t;
+
+void receive_pumpone_efuse(const can_msg_t *message, pumpone_efuse_t *pumpone_efuse);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} pumptwo_efuse_t;
+
+void receive_pumptwo_efuse(const can_msg_t *message, pumptwo_efuse_t *pumptwo_efuse);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} battbox_efuse_t;
+
+void receive_battbox_efuse(const can_msg_t *message, battbox_efuse_t *battbox_efuse);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} mc_efuse_t;
+
+void receive_mc_efuse(const can_msg_t *message, mc_efuse_t *mc_efuse);
+
+typedef struct {
+ uint16_t ADC;
+ float voltage;
+ float current;
+ bool is_faulted;
+ bool is_enabled;
+ uint8_t control_state;
+} spare_efuse_t;
+
+void receive_spare_efuse(const can_msg_t *message, spare_efuse_t *spare_efuse);
+
+typedef struct {
+ bool bms_gpio;
+ bool bots_gpio;
+ bool spare_gpio;
+ bool bspd_gpio;
+ bool hv_c;
+ bool hvd_gpio;
+ bool imd_gpio;
+ bool ckpt_gpio;
+ bool inertia_sw_gpio;
+ bool tsms_gpio;
+ uint8_t UNUSED;
+} shutdown_pins_t;
+
+void receive_shutdown_pins(const can_msg_t *message, shutdown_pins_t *shutdown_pins);
+
+typedef struct {
+ bool home_mode;
+ uint8_t nero_index;
+ float car_speed;
+ bool tsms;
+ float torque_limit_percentage;
+ bool reverse;
+ uint16_t regen_limit;
+ bool launch_control;
+ uint8_t functional_state;
+ bool traction_control;
+} car_state_t;
+
+void receive_car_state(const can_msg_t *message, car_state_t *car_state);
+
+typedef struct {
+ float accel_norm;
+ float brake_norm;
+} pedal_percent_pressed_values_t;
+
+void receive_pedal_percent_pressed_values(const can_msg_t *message, pedal_percent_pressed_values_t *pedal_percent_pressed_values);
+
+typedef struct {
+ float accel1_volts;
+ float accel2_volts;
+ float brake1_volts;
+ float brake2_volts;
+} pedal_sensor_voltages_t;
+
+void receive_pedal_sensor_voltages(const can_msg_t *message, pedal_sensor_voltages_t *pedal_sensor_voltages);
+
+typedef struct {
+ uint8_t status;
+} lightning_board_light_status_t;
+
+void receive_lightning_board_light_status(const can_msg_t *message, lightning_board_light_status_t *lightning_board_light_status);
+
+typedef struct {
+ float vcu_temperature;
+ float vcu_humidity;
+} temperature_sensor_t;
+
+void receive_temperature_sensor(const can_msg_t *message, temperature_sensor_t *temperature_sensor);
+
+typedef struct {
+ float imu_accelerometer_x;
+ float imu_accelerometer_y;
+ float imu_accelerometer_z;
+} imu_accelerometer_t;
+
+void receive_imu_accelerometer(const can_msg_t *message, imu_accelerometer_t *imu_accelerometer);
+
+typedef struct {
+ float imu_gyro_x;
+ float imu_gyro_y;
+ float imu_gyro_z;
+} imu_gyro_t;
+
+void receive_imu_gyro(const can_msg_t *message, imu_gyro_t *imu_gyro);
+
+typedef struct {
+ bool CAN_OUTGOING_FAULT;
+ bool CAN_INCOMING_FAULT;
+ bool BMS_CAN_MONITOR_FAULT;
+ bool LIGHTNING_CAN_MONITOR_FAULT;
+ bool SHUTDOWN_FAULT;
+ bool ONBOARD_TEMP_FAULT;
+ bool IMU_ACCEL_FAULT;
+ bool IMU_GYRO_FAULT;
+ bool BSPD_PREFAULT;
+ bool ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT;
+ bool ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT;
+ bool ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT;
+ bool ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT;
+ bool ONBOARD_PEDAL_DIFFERENCE_FAULT;
+ bool RTDS_FAULT;
+ bool LV_LOW_VOLTAGE_FAULT;
+} faults_t;
+
+void receive_faults(const can_msg_t *message, faults_t *faults);
+
+typedef struct {
+ uint16_t ADC;
+ float Voltage;
+} lv_voltage_t;
+
+void receive_lv_voltage(const can_msg_t *message, lv_voltage_t *lv_voltage);
+
+typedef struct {
+ uint8_t three_bits;
+ float float_value;
+ uint8_t five_bits;
+ uint16_t sixteen_bits;
+ int8_t signed_8_bits;
+} vcu_test_message_t;
+
+void receive_vcu_test_message(const can_msg_t *message, vcu_test_message_t *vcu_test_message);
+
+typedef struct {
+ uint16_t temp;
+} dti_motor_temp_as_reported_by_vcu_t;
+
+void receive_dti_motor_temp_as_reported_by_vcu(const can_msg_t *message, dti_motor_temp_as_reported_by_vcu_t *dti_motor_temp_as_reported_by_vcu);
+
+typedef struct {
+ uint16_t temp;
+} dti_controller_temp_as_reported_by_vcu_t;
+
+void receive_dti_controller_temp_as_reported_by_vcu(const can_msg_t *message, dti_controller_temp_as_reported_by_vcu_t *dti_controller_temp_as_reported_by_vcu);
+
+typedef struct {
+ float temp;
+} bms_battbox_temp_as_reported_by_vcu_t;
+
+void receive_bms_battbox_temp_as_reported_by_vcu(const can_msg_t *message, bms_battbox_temp_as_reported_by_vcu_t *bms_battbox_temp_as_reported_by_vcu);
+
+typedef struct {
+ bool brake_state;
+} brake_state_as_reported_by_vcu_t;
+
+void receive_brake_state_as_reported_by_vcu(const can_msg_t *message, brake_state_as_reported_by_vcu_t *brake_state_as_reported_by_vcu);
+
+typedef struct {
+ bool pin_state;
+ bool sounding_state;
+ bool reverse_state;
+ bool error;
+} rtds_state_message_t;
+
+void receive_rtds_state_message(const can_msg_t *message, rtds_state_message_t *rtds_state_message);
+
+typedef struct {
+ uint16_t raw;
+ float voltage;
+ float current;
+} lfiu_low_current_adc_readings_t;
+
+void receive_lfiu_low_current_adc_readings(const can_msg_t *message, lfiu_low_current_adc_readings_t *lfiu_low_current_adc_readings);
+
+typedef struct {
+ uint16_t raw;
+ float voltage;
+ float current;
+} lfiu_high_current_adc_readings_t;
+
+void receive_lfiu_high_current_adc_readings(const can_msg_t *message, lfiu_high_current_adc_readings_t *lfiu_high_current_adc_readings);
+
+typedef struct {
+ uint16_t one;
+ uint8_t two;
+ uint8_t three;
+ bool four;
+ uint8_t five;
+ uint32_t six;
+} second_vcu_test_message_t;
+
+void receive_second_vcu_test_message(const can_msg_t *message, second_vcu_test_message_t *second_vcu_test_message);
+
+typedef struct {
+ uint8_t fan_pwm_percentage;
+} lv_box_fan_pwm_t;
+
+void receive_lv_box_fan_pwm(const can_msg_t *message, lv_box_fan_pwm_t *lv_box_fan_pwm);
+
+typedef struct {
+ bool bms_shutdown_as_reported_by_vcu;
+} bms_shutdown_status_as_reported_by_vcu_t;
+
+void receive_bms_shutdown_status_as_reported_by_vcu(const can_msg_t *message, bms_shutdown_status_as_reported_by_vcu_t *bms_shutdown_status_as_reported_by_vcu);
+
+typedef struct {
+ uint8_t pwm_duty;
+} shepherd_bms_fan_percent_t;
+
+void receive_shepherd_bms_fan_percent(const can_msg_t *message, shepherd_bms_fan_percent_t *shepherd_bms_fan_percent);
+
+typedef struct {
+ uint8_t state;
+} dashboard_efuse_state_t;
+
+void receive_dashboard_efuse_state(const can_msg_t *message, dashboard_efuse_state_t *dashboard_efuse_state);
+
+typedef struct {
+ uint8_t state;
+} brake_efuse_state_t;
+
+void receive_brake_efuse_state(const can_msg_t *message, brake_efuse_state_t *brake_efuse_state);
+
+typedef struct {
+ uint8_t state;
+} shutdown_efuse_state_t;
+
+void receive_shutdown_efuse_state(const can_msg_t *message, shutdown_efuse_state_t *shutdown_efuse_state);
+
+typedef struct {
+ uint8_t state;
+} lv_efuse_state_t;
+
+void receive_lv_efuse_state(const can_msg_t *message, lv_efuse_state_t *lv_efuse_state);
+
+typedef struct {
+ uint8_t state;
+} radfan_efuse_state_t;
+
+void receive_radfan_efuse_state(const can_msg_t *message, radfan_efuse_state_t *radfan_efuse_state);
+
+typedef struct {
+ uint8_t state;
+} fanbatt_efuse_state_t;
+
+void receive_fanbatt_efuse_state(const can_msg_t *message, fanbatt_efuse_state_t *fanbatt_efuse_state);
+
+typedef struct {
+ uint8_t state;
+} pumpone_efuse_state_t;
+
+void receive_pumpone_efuse_state(const can_msg_t *message, pumpone_efuse_state_t *pumpone_efuse_state);
+
+typedef struct {
+ uint8_t state;
+} pumptwo_efuse_state_t;
+
+void receive_pumptwo_efuse_state(const can_msg_t *message, pumptwo_efuse_state_t *pumptwo_efuse_state);
+
+typedef struct {
+ uint8_t state;
+} battbox_efuse_state_t;
+
+void receive_battbox_efuse_state(const can_msg_t *message, battbox_efuse_state_t *battbox_efuse_state);
+
+typedef struct {
+ uint8_t state;
+} mc_efuse_state_t;
+
+void receive_mc_efuse_state(const can_msg_t *message, mc_efuse_state_t *mc_efuse_state);
+
+typedef struct {
+ uint8_t state;
+} spare_efuse_state_t;
+
+void receive_spare_efuse_state(const can_msg_t *message, spare_efuse_state_t *spare_efuse_state);
+
+typedef struct {
+ uint8_t command;
+} rtds_command_message_t;
+
+void receive_rtds_command_message(const can_msg_t *message, rtds_command_message_t *rtds_command_message);
+
+typedef struct {
+ uint16_t R_iso_corrected;
+ uint8_t R_iso_status;
+ uint8_t Iso_measurement_counter;
+ bool device_error;
+ bool HV_pos_conn_fail;
+ bool HV_neg_conn_fail;
+ bool Earth_conn_fail;
+ bool Iso_alarm;
+ bool iso_warning;
+ bool iso_outdated;
+ bool Unbalance_alarm;
+ bool Undervoltage_alarm;
+ bool Unsafe_to_start;
+ bool Earthlift_Open;
+ uint8_t warnings_and_alarms_unused_bits;
+ uint8_t Device_Activity;
+ uint8_t Not_Applicable;
+} imd_general_information_t;
+
+void receive_imd_general_information(const can_msg_t *message, imd_general_information_t *imd_general_information);
+
+typedef struct {
+ uint8_t button_id;
+} wheel_buttons_t;
+
+void receive_wheel_buttons(const can_msg_t *message, wheel_buttons_t *wheel_buttons);
+
+typedef struct {
+ float charge_volts;
+ float charge_current;
+ uint8_t enable_charging;
+} bms_charge_message_send_t;
+
+void receive_bms_charge_message_send(const can_msg_t *message, bms_charge_message_send_t *bms_charge_message_send);
+
+typedef struct {
+ uint8_t state;
+ float temp_average;
+} bms_status_t;
+
+void receive_bms_status(const can_msg_t *message, bms_status_t *bms_status);
+
+typedef struct {
+ float high_val;
+ uint8_t high_chip;
+ uint8_t high_cell;
+ float low_val;
+ uint8_t low_chip;
+ uint8_t low_cell;
+ float avg_val;
+} cell_voltage_t;
+
+void receive_cell_voltage(const can_msg_t *message, cell_voltage_t *cell_voltage);
+
+typedef struct {
+ float high_val;
+ uint8_t high_chip;
+ uint8_t high_cell;
+ float low_val;
+ uint8_t low_chip;
+ uint8_t low_cell;
+ float avg_val;
+} cell_temperatures_t;
+
+void receive_cell_temperatures(const can_msg_t *message, cell_temperatures_t *cell_temperatures);
+
+typedef struct {
+ float seg1;
+ float seg2;
+ float seg3;
+ float seg4;
+ float seg5;
+} segment_temperatures_t;
+
+void receive_segment_temperatures(const can_msg_t *message, segment_temperatures_t *segment_temperatures);
+
+typedef struct {
+ uint8_t state;
+ uint8_t break_location;
+ uint8_t verification_attempts;
+ uint8_t recovery_successful;
+} segment_isospi_communication_status_t;
+
+void receive_segment_isospi_communication_status(const can_msg_t *message, segment_isospi_communication_status_t *segment_isospi_communication_status);
+
+typedef struct {
+ bool dcl_enforce;
+ bool ccl_enforce;
+ bool low_cell_volt;
+ bool high_cell_volt;
+ bool high_charge_volt;
+ bool pack_hot;
+ bool die_temp_max;
+ bool segment_comms;
+ bool hv_plate_comms;
+} fault_status_t;
+
+void receive_fault_status(const can_msg_t *message, fault_status_t *fault_status);
+
+typedef struct {
+ float seg1;
+ float seg2;
+ float seg3;
+ float seg4;
+ float seg5;
+} segment_average_voltages_t;
+
+void receive_segment_average_voltages(const can_msg_t *message, segment_average_voltages_t *segment_average_voltages);
+
+typedef struct {
+ float seg1;
+ float seg2;
+ float seg3;
+ float seg4;
+ float seg5;
+} segment_total_voltages_t;
+
+void receive_segment_total_voltages(const can_msg_t *message, segment_total_voltages_t *segment_total_voltages);
+
+typedef struct {
+ float seg1;
+ float seg2;
+ float seg3;
+ float seg4;
+ float seg5;
+} segment_delta_voltages_t;
+
+void receive_segment_delta_voltages(const can_msg_t *message, segment_delta_voltages_t *segment_delta_voltages);
+
+typedef struct {
+ uint8_t spare0;
+ uint8_t spare1;
+ uint16_t spare2;
+ uint32_t spare3;
+} bms_debug_t;
+
+void receive_bms_debug(const can_msg_t *message, bms_debug_t *bms_debug);
+
+typedef struct {
+ uint8_t start_stop;
+ uint8_t code;
+ float value;
+} bms_fault_timers_t;
+
+void receive_bms_fault_timers(const can_msg_t *message, bms_fault_timers_t *bms_fault_timers);
+
+typedef struct {
+ uint8_t major;
+ uint8_t minor;
+ uint8_t patch;
+ bool dirty;
+ bool local_commit;
+} shepherd_version_tag_t;
+
+void receive_shepherd_version_tag(const can_msg_t *message, shepherd_version_tag_t *shepherd_version_tag);
+
+typedef struct {
+ uint32_t short_hash;
+ uint32_t author_hash;
+} shepherd_version_hash_t;
+
+void receive_shepherd_version_hash(const can_msg_t *message, shepherd_version_hash_t *shepherd_version_hash);
+
+typedef struct {
+ uint32_t overflow_can_id;
+ uint16_t overflow_cnt;
+} overflow_notification_for_percell_t;
+
+void receive_overflow_notification_for_percell(const can_msg_t *message, overflow_notification_for_percell_t *overflow_notification_for_percell);
+
+typedef struct {
+ float therm;
+ float voltage_a;
+ float voltage_b;
+ uint8_t chip_id;
+ uint8_t cell_a;
+ uint8_t cell_b;
+ bool discharging_a;
+ bool discharging_b;
+ bool cvs_a;
+ bool cvs_b;
+} alpha_cell_data_debug_t;
+
+void receive_alpha_cell_data_debug(const can_msg_t *message, alpha_cell_data_debug_t *alpha_cell_data_debug);
+
+typedef struct {
+ float therm;
+ float voltage_a;
+ float voltage_b;
+ uint8_t chip_id;
+ uint8_t cell_a;
+ uint8_t cell_b;
+ bool discharging_a;
+ bool discharging_b;
+ bool cvs_a;
+ bool cvs_b;
+} beta_cell_data_debug_t;
+
+void receive_beta_cell_data_debug(const can_msg_t *message, beta_cell_data_debug_t *beta_cell_data_debug);
+
+typedef struct {
+ uint8_t chip_id;
+ float die_temp;
+ float vpv;
+ float vmv;
+ bool va_ov;
+ bool va_uv;
+ bool vd_ov;
+ bool vd_uv;
+ bool vde;
+ bool vdel;
+ bool spiflt;
+ bool sleep;
+ bool thsd;
+ bool tmodchk;
+ bool oscchk;
+} alpha_chip_a_debug_t;
+
+void receive_alpha_chip_a_debug(const can_msg_t *message, alpha_chip_a_debug_t *alpha_chip_a_debug);
+
+typedef struct {
+ float vres;
+ uint8_t chip_id;
+ float vref2;
+ float v_analog;
+ float v_digital;
+ bool otp1_med;
+ bool opt2_med;
+} alpha_chip_b_debug_t;
+
+void receive_alpha_chip_b_debug(const can_msg_t *message, alpha_chip_b_debug_t *alpha_chip_b_debug);
+
+typedef struct {
+ uint8_t chip_id;
+ float die_temp;
+ float vpv;
+ float vmv;
+ bool va_ov;
+ bool va_uv;
+ bool vd_ov;
+ bool vd_uv;
+ bool vde;
+ bool vdel;
+ bool spiflt;
+ bool sleep;
+ bool thsd;
+ bool tmodchk;
+ bool oscchk;
+} beta_chip_a_debug_t;
+
+void receive_beta_chip_a_debug(const can_msg_t *message, beta_chip_a_debug_t *beta_chip_a_debug);
+
+typedef struct {
+ float vres;
+ uint8_t chip_id;
+ float vref2;
+ float v_analog;
+ float v_digital;
+ bool otp1_med;
+ bool opt2_med;
+} beta_chip_b_debug_t;
+
+void receive_beta_chip_b_debug(const can_msg_t *message, beta_chip_b_debug_t *beta_chip_b_debug);
+
+typedef struct {
+ uint8_t fan_duty_cycle;
+} fan_duty_cycle_percentage_t;
+
+void receive_fan_duty_cycle_percentage(const can_msg_t *message, fan_duty_cycle_percentage_t *fan_duty_cycle_percentage);
+
+typedef struct {
+ uint8_t chip_id;
+ float therm_temp_1;
+ float therm_temp_2;
+ float therm_temp_3;
+} onboard_therm_temperatures_t;
+
+void receive_onboard_therm_temperatures(const can_msg_t *message, onboard_therm_temperatures_t *onboard_therm_temperatures);
+
+typedef struct {
+ bool precharge_status;
+} precharge_status_t;
+
+void receive_precharge_status(const can_msg_t *message, precharge_status_t *precharge_status);
+
+typedef struct {
+ float batt_voltage;
+ float ts_voltage;
+ float shunt_temp;
+ float pack_current;
+} hv_plate_data_t;
+
+void receive_hv_plate_data(const can_msg_t *message, hv_plate_data_t *hv_plate_data);
+
+typedef struct {
+ uint8_t chip_id;
+ uint16_t pec_errors;
+} segment_pec_errors_t;
+
+void receive_segment_pec_errors(const can_msg_t *message, segment_pec_errors_t *segment_pec_errors);
+
+typedef struct {
+ uint16_t pec_errors;
+} hv_plate_pec_errors_t;
+
+void receive_hv_plate_pec_errors(const can_msg_t *message, hv_plate_pec_errors_t *hv_plate_pec_errors);
+
+typedef struct {
+ uint16_t flags;
+ float vreg;
+ float tmp1;
+ float vref1p25;
+ uint16_t osccnt;
+} hv_plate_diagnostics_t;
+
+void receive_hv_plate_diagnostics(const can_msg_t *message, hv_plate_diagnostics_t *hv_plate_diagnostics);
+
+typedef struct {
+ float epad;
+ float vdig;
+ float vdd;
+ float tmp2;
+ float vdiv;
+} hv_plate_diagnostics_second_t;
+
+void receive_hv_plate_diagnostics_second(const can_msg_t *message, hv_plate_diagnostics_second_t *hv_plate_diagnostics_second);
+
+typedef struct {
+ float internal_temp;
+} bms_onboard_temperature_t;
+
+void receive_bms_onboard_temperature(const can_msg_t *message, bms_onboard_temperature_t *bms_onboard_temperature);
+
+typedef struct {
+ float imu_accelerometer_x;
+ float imu_accelerometer_y;
+ float imu_accelerometer_z;
+} bms_imu_accelerometer_t;
+
+void receive_bms_imu_accelerometer(const can_msg_t *message, bms_imu_accelerometer_t *bms_imu_accelerometer);
+
+typedef struct {
+ float imu_gyro_x;
+ float imu_gyro_y;
+ float imu_gyro_z;
+} bms_imu_gyro_t;
+
+void receive_bms_imu_gyro(const can_msg_t *message, bms_imu_gyro_t *bms_imu_gyro);
+
+typedef struct {
+ float Pack_SoC;
+ float Pack_SoC_Drift;
+} pack_soc_status_t;
+
+void receive_pack_soc_status(const can_msg_t *message, pack_soc_status_t *pack_soc_status);
+
+typedef struct {
+ bool shutdown;
+} shutdown_as_read_by_bms_t;
+
+void receive_shutdown_as_read_by_bms(const can_msg_t *message, shutdown_as_read_by_bms_t *shutdown_as_read_by_bms);
+
+typedef struct {
+ uint8_t state;
+ uint8_t verification_attempts;
+ uint8_t recovery_successful;
+} hv_plate_isospi_communication_status_t;
+
+void receive_hv_plate_isospi_communication_status(const can_msg_t *message, hv_plate_isospi_communication_status_t *hv_plate_isospi_communication_status);
+
+typedef struct {
+ bool critically_faulted;
+} bms_critically_faulted_t;
+
+void receive_bms_critically_faulted(const can_msg_t *message, bms_critically_faulted_t *bms_critically_faulted);
+
+
+void receive_can(const can_msg_t *msg);
+
+#endif
\ No newline at end of file
diff --git a/Core/Inc/stm32h5xx_it.h b/Core/Inc/stm32h5xx_it.h
index d65986e..f81f2af 100644
--- a/Core/Inc/stm32h5xx_it.h
+++ b/Core/Inc/stm32h5xx_it.h
@@ -54,6 +54,7 @@ void UsageFault_Handler(void);
 void DebugMon_Handler(void);
 void TIM2_IRQHandler(void);
 void FDCAN2_IT0_IRQHandler(void);
+void FDCAN2_IT1_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
 /* USER CODE END EFP */
diff --git a/Core/Inc/u_can.h b/Core/Inc/u_can.h
index 9ffe0ee..146d92e 100644
--- a/Core/Inc/u_can.h
+++ b/Core/Inc/u_can.h
@@ -14,11 +14,13 @@ uint8_t can2_init(FDCAN_HandleTypeDef *hcan);
 extern can_t can2;
 
 /* List of CAN IDs */
-#define CERBERUS_MSG_ID          0x0CA
-#define IMU_ACCEL_MSG_ID         0xAAA
-#define IMU_GYRO_MSG_ID          0xAAB
-#define LIGHTNING_SENSOR_MSG_ID  0xAAC
-#define MAGNOMETER_MSG_ID        0xAAD
+#define CERBERUS_MSG_ID           0x0CA
+#define IMU_ACCEL_MSG_ID          0xAAA
+#define IMU_GYRO_MSG_ID           0xAAB
+#define LIGHTNING_SENSOR_MSG_ID   0xAAC
+#define MAGNOMETER_MSG_ID         0xAAD
+#define IMD_GENERAL_MSG_ID        0x37
+#define BMS_LIGHTNING_OKAY_MSG_ID 0x01E
 
 
 #endif /* u_can.h */
\ No newline at end of file
diff --git a/Core/Inc/u_lights.h b/Core/Inc/u_lights.h
new file mode 100644
index 0000000..0b15172
--- /dev/null
+++ b/Core/Inc/u_lights.h
@@ -0,0 +1,6 @@
+#pragma once
+
+/* API */
+void lights_setRed(void); // Turns on the red light, and off the green light.
+void lights_setGreen(void); //  Turns on the green light, and off the red light.
+void lights_setOff(void); // Sets all lights off.
\ No newline at end of file
diff --git a/Core/Inc/u_mutexes.h b/Core/Inc/u_mutexes.h
index 2e3742e..0f38ad8 100644
--- a/Core/Inc/u_mutexes.h
+++ b/Core/Inc/u_mutexes.h
@@ -7,9 +7,6 @@
 #include <stdint.h>
 #include <stdbool.h>
 
-/* Mutex List */
-extern mutex_t state_machine_mutex; // State Machine Mutex
-
 /**
  * @brief Initializes all mutexes
  * @return Returns a tx status
diff --git a/Core/Inc/u_statemachine.h b/Core/Inc/u_statemachine.h
index 7518c00..adebfba 100644
--- a/Core/Inc/u_statemachine.h
+++ b/Core/Inc/u_statemachine.h
@@ -2,6 +2,7 @@
 #define __STATEMACHINE_H
 
 #include "u_tx_debug.h"
+#include "u_can.h"
 #include <stdint.h>
 #include <stdio.h>
 
@@ -13,16 +14,13 @@ typedef enum {
 } Lightning_Board_Light_Status;
 
 /**
- * @brief sets the state of the lightning board
- * @param state the state to change to
+ * @brief Determines the appropriate Lighting board light state based on the IMD and BMS statuses.
+ * @return The Lightning Board Light Status.
  */
-uint8_t set_statemachine(Lightning_Board_Light_Status state);
-
-/**
- * @brief returns the statemachine state
- * @return the state machine state
- */
-Lightning_Board_Light_Status get_current_state();
+Lightning_Board_Light_Status statemachine_getState();
 
+void statemachine_handleIMDMessage(can_msg_t* message); // Handles the IMD status message. 
+void statemachine_handleBMSMessage(can_msg_t* message); // Handles the BMS status message.
+ 
 #endif /* u_statemachine.h */
 
diff --git a/Core/Src/app_threadx.c b/Core/Src/app_threadx.c
index 02e3b3f..419f251 100644
--- a/Core/Src/app_threadx.c
+++ b/Core/Src/app_threadx.c
@@ -68,7 +68,7 @@ UINT App_ThreadX_Init(VOID *memory_ptr)
   /* Init user-written code that uses ThreadX stuff here. */
   CATCH_ERROR(queues_init(byte_pool), U_SUCCESS);
   CATCH_ERROR(mutexes_init(), U_SUCCESS);
-  // CATCH_ERROR(init_imu(), U_SUCCESS);
+  //CATCH_ERROR(init_imu(), U_SUCCESS);
   CATCH_ERROR(init_lightning_sensor(), U_SUCCESS);
   // CATCH_ERROR(init_magnetometer(), U_SUCCESS);
   CATCH_ERROR(threads_init(byte_pool), U_SUCCESS);
diff --git a/Core/Src/can_messages_rx.c b/Core/Src/can_messages_rx.c
new file mode 100644
index 0000000..1806a9e
--- /dev/null
+++ b/Core/Src/can_messages_rx.c
@@ -0,0 +1,2093 @@
+#include "can_messages_rx.h"
+
+void receive_front_msb_env(const can_msg_t *message, front_msb_env_t *front_msb_env) {
+    
+    uint32_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 4);
+    uint32_t data = __builtin_bswap32(data_bigendian);
+    uint64_t temp_mask = (1ULL << 16) - 1ULL;
+    uint64_t temp_raw = (data >> 16) & temp_mask;
+    front_msb_env->temp = (float)(temp_raw / 10);
+    uint64_t humidity_mask = (1ULL << 16) - 1ULL;
+    uint64_t humidity_raw = (data >> 0) & humidity_mask;
+    front_msb_env->humidity = (float)(humidity_raw / 10);
+}
+
+void receive_front_msb_accel(const can_msg_t *message, front_msb_accel_t *front_msb_accel) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t x_force_mask = (1ULL << 16) - 1ULL;
+    uint64_t x_force_bits = (data >> 48) & x_force_mask;
+    int64_t x_force_raw = (x_force_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(x_force_bits | ~x_force_mask)
+        : (int64_t)x_force_bits;
+    front_msb_accel->x_force = (float)x_force_raw;
+    uint64_t y_force_mask = (1ULL << 16) - 1ULL;
+    uint64_t y_force_bits = (data >> 32) & y_force_mask;
+    int64_t y_force_raw = (y_force_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(y_force_bits | ~y_force_mask)
+        : (int64_t)y_force_bits;
+    front_msb_accel->y_force = (float)y_force_raw;
+    uint64_t z_force_mask = (1ULL << 16) - 1ULL;
+    uint64_t z_force_bits = (data >> 16) & z_force_mask;
+    int64_t z_force_raw = (z_force_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(z_force_bits | ~z_force_mask)
+        : (int64_t)z_force_bits;
+    front_msb_accel->z_force = (float)z_force_raw;
+}
+
+void receive_front_msb_gyro(const can_msg_t *message, front_msb_gyro_t *front_msb_gyro) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t x_deg_mask = (1ULL << 16) - 1ULL;
+    uint64_t x_deg_bits = (data >> 48) & x_deg_mask;
+    int64_t x_deg_raw = (x_deg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(x_deg_bits | ~x_deg_mask)
+        : (int64_t)x_deg_bits;
+    front_msb_gyro->x_deg = (float)x_deg_raw;
+    uint64_t y_deg_mask = (1ULL << 16) - 1ULL;
+    uint64_t y_deg_bits = (data >> 32) & y_deg_mask;
+    int64_t y_deg_raw = (y_deg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(y_deg_bits | ~y_deg_mask)
+        : (int64_t)y_deg_bits;
+    front_msb_gyro->y_deg = (float)y_deg_raw;
+    uint64_t z_deg_mask = (1ULL << 16) - 1ULL;
+    uint64_t z_deg_bits = (data >> 16) & z_deg_mask;
+    int64_t z_deg_raw = (z_deg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(z_deg_bits | ~z_deg_mask)
+        : (int64_t)z_deg_bits;
+    front_msb_gyro->z_deg = (float)z_deg_raw;
+}
+
+void receive_front_msb_strain(const can_msg_t *message, front_msb_strain_t *front_msb_strain) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t strain1_mask = (1ULL << 32) - 1ULL;
+    uint64_t strain1_raw = (data >> 32) & strain1_mask;
+    front_msb_strain->strain1 = (uint32_t)strain1_raw;
+    uint64_t strain2_mask = (1ULL << 32) - 1ULL;
+    uint64_t strain2_raw = (data >> 0) & strain2_mask;
+    front_msb_strain->strain2 = (uint32_t)strain2_raw;
+}
+
+void receive_front_shockpot(const can_msg_t *message, front_shockpot_t *front_shockpot) {
+    
+    struct __attribute__((__packed__)) {
+        uint32_t shock1;
+        uint16_t shock1_raw;
+        
+    } bitstream_data;
+
+    memcpy(&bitstream_data, message->data, sizeof(bitstream_data));
+
+    
+    
+    front_shockpot->shock1 = (float)bitstream_data.shock1;
+    
+    
+    
+    front_shockpot->shock1_raw = (uint16_t)bitstream_data.shock1_raw;
+    
+    
+}
+
+void receive_front_ride_height(const can_msg_t *message, front_ride_height_t *front_ride_height) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t rh_mask = (1ULL << 16) - 1ULL;
+    uint64_t rh_bits = (data >> 0) & rh_mask;
+    int64_t rh_raw = (rh_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(rh_bits | ~rh_mask)
+        : (int64_t)rh_bits;
+    front_ride_height->rh = (float)rh_raw;
+}
+
+void receive_front_wheel_temp(const can_msg_t *message, front_wheel_temp_t *front_wheel_temp) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t wheel_temp_mask = (1ULL << 16) - 1ULL;
+    uint64_t wheel_temp_raw = (data >> 0) & wheel_temp_mask;
+    front_wheel_temp->wheel_temp = (float)wheel_temp_raw;
+}
+
+void receive_front_msb_orientation(const can_msg_t *message, front_msb_orientation_t *front_msb_orientation) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t x_fdeg_mask = (1ULL << 16) - 1ULL;
+    uint64_t x_fdeg_bits = (data >> 48) & x_fdeg_mask;
+    int64_t x_fdeg_raw = (x_fdeg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(x_fdeg_bits | ~x_fdeg_mask)
+        : (int64_t)x_fdeg_bits;
+    front_msb_orientation->x_fdeg = (float)x_fdeg_raw;
+    uint64_t y_fdeg_mask = (1ULL << 16) - 1ULL;
+    uint64_t y_fdeg_bits = (data >> 32) & y_fdeg_mask;
+    int64_t y_fdeg_raw = (y_fdeg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(y_fdeg_bits | ~y_fdeg_mask)
+        : (int64_t)y_fdeg_bits;
+    front_msb_orientation->y_fdeg = (float)y_fdeg_raw;
+    uint64_t z_fdeg_mask = (1ULL << 16) - 1ULL;
+    uint64_t z_fdeg_bits = (data >> 16) & z_fdeg_mask;
+    int64_t z_fdeg_raw = (z_fdeg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(z_fdeg_bits | ~z_fdeg_mask)
+        : (int64_t)z_fdeg_bits;
+    front_msb_orientation->z_fdeg = (float)z_fdeg_raw;
+}
+
+void receive_back_msb_env(const can_msg_t *message, back_msb_env_t *back_msb_env) {
+    
+    uint32_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 4);
+    uint32_t data = __builtin_bswap32(data_bigendian);
+    uint64_t temp_mask = (1ULL << 16) - 1ULL;
+    uint64_t temp_raw = (data >> 16) & temp_mask;
+    back_msb_env->temp = (float)(temp_raw / 10);
+    uint64_t humidity_mask = (1ULL << 16) - 1ULL;
+    uint64_t humidity_raw = (data >> 0) & humidity_mask;
+    back_msb_env->humidity = (float)(humidity_raw / 10);
+}
+
+void receive_back_msb_accel(const can_msg_t *message, back_msb_accel_t *back_msb_accel) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t x_force_mask = (1ULL << 16) - 1ULL;
+    uint64_t x_force_bits = (data >> 48) & x_force_mask;
+    int64_t x_force_raw = (x_force_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(x_force_bits | ~x_force_mask)
+        : (int64_t)x_force_bits;
+    back_msb_accel->x_force = (float)x_force_raw;
+    uint64_t y_force_mask = (1ULL << 16) - 1ULL;
+    uint64_t y_force_bits = (data >> 32) & y_force_mask;
+    int64_t y_force_raw = (y_force_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(y_force_bits | ~y_force_mask)
+        : (int64_t)y_force_bits;
+    back_msb_accel->y_force = (float)y_force_raw;
+    uint64_t z_force_mask = (1ULL << 16) - 1ULL;
+    uint64_t z_force_bits = (data >> 16) & z_force_mask;
+    int64_t z_force_raw = (z_force_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(z_force_bits | ~z_force_mask)
+        : (int64_t)z_force_bits;
+    back_msb_accel->z_force = (float)z_force_raw;
+}
+
+void receive_back_msb_gyro(const can_msg_t *message, back_msb_gyro_t *back_msb_gyro) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t x_deg_mask = (1ULL << 16) - 1ULL;
+    uint64_t x_deg_bits = (data >> 48) & x_deg_mask;
+    int64_t x_deg_raw = (x_deg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(x_deg_bits | ~x_deg_mask)
+        : (int64_t)x_deg_bits;
+    back_msb_gyro->x_deg = (float)x_deg_raw;
+    uint64_t y_deg_mask = (1ULL << 16) - 1ULL;
+    uint64_t y_deg_bits = (data >> 32) & y_deg_mask;
+    int64_t y_deg_raw = (y_deg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(y_deg_bits | ~y_deg_mask)
+        : (int64_t)y_deg_bits;
+    back_msb_gyro->y_deg = (float)y_deg_raw;
+    uint64_t z_deg_mask = (1ULL << 16) - 1ULL;
+    uint64_t z_deg_bits = (data >> 16) & z_deg_mask;
+    int64_t z_deg_raw = (z_deg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(z_deg_bits | ~z_deg_mask)
+        : (int64_t)z_deg_bits;
+    back_msb_gyro->z_deg = (float)z_deg_raw;
+}
+
+void receive_back_msb_strain(const can_msg_t *message, back_msb_strain_t *back_msb_strain) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t strain1_mask = (1ULL << 32) - 1ULL;
+    uint64_t strain1_raw = (data >> 32) & strain1_mask;
+    back_msb_strain->strain1 = (uint32_t)strain1_raw;
+    uint64_t strain2_mask = (1ULL << 32) - 1ULL;
+    uint64_t strain2_raw = (data >> 0) & strain2_mask;
+    back_msb_strain->strain2 = (uint32_t)strain2_raw;
+}
+
+void receive_back_shockpot(const can_msg_t *message, back_shockpot_t *back_shockpot) {
+    
+    struct __attribute__((__packed__)) {
+        uint32_t shock1;
+        uint16_t shock1_raw;
+        
+    } bitstream_data;
+
+    memcpy(&bitstream_data, message->data, sizeof(bitstream_data));
+
+    
+    
+    back_shockpot->shock1 = (float)bitstream_data.shock1;
+    
+    
+    
+    back_shockpot->shock1_raw = (uint16_t)bitstream_data.shock1_raw;
+    
+    
+}
+
+void receive_back_ride_height(const can_msg_t *message, back_ride_height_t *back_ride_height) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t rh_mask = (1ULL << 16) - 1ULL;
+    uint64_t rh_bits = (data >> 0) & rh_mask;
+    int64_t rh_raw = (rh_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(rh_bits | ~rh_mask)
+        : (int64_t)rh_bits;
+    back_ride_height->rh = (float)rh_raw;
+}
+
+void receive_back_wheel_temp(const can_msg_t *message, back_wheel_temp_t *back_wheel_temp) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t wheel_temp_mask = (1ULL << 16) - 1ULL;
+    uint64_t wheel_temp_raw = (data >> 0) & wheel_temp_mask;
+    back_wheel_temp->wheel_temp = (float)wheel_temp_raw;
+}
+
+void receive_back_msb_orientation(const can_msg_t *message, back_msb_orientation_t *back_msb_orientation) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t x_fdeg_mask = (1ULL << 16) - 1ULL;
+    uint64_t x_fdeg_bits = (data >> 48) & x_fdeg_mask;
+    int64_t x_fdeg_raw = (x_fdeg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(x_fdeg_bits | ~x_fdeg_mask)
+        : (int64_t)x_fdeg_bits;
+    back_msb_orientation->x_fdeg = (float)x_fdeg_raw;
+    uint64_t y_fdeg_mask = (1ULL << 16) - 1ULL;
+    uint64_t y_fdeg_bits = (data >> 32) & y_fdeg_mask;
+    int64_t y_fdeg_raw = (y_fdeg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(y_fdeg_bits | ~y_fdeg_mask)
+        : (int64_t)y_fdeg_bits;
+    back_msb_orientation->y_fdeg = (float)y_fdeg_raw;
+    uint64_t z_fdeg_mask = (1ULL << 16) - 1ULL;
+    uint64_t z_fdeg_bits = (data >> 16) & z_fdeg_mask;
+    int64_t z_fdeg_raw = (z_fdeg_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(z_fdeg_bits | ~z_fdeg_mask)
+        : (int64_t)z_fdeg_bits;
+    back_msb_orientation->z_fdeg = (float)z_fdeg_raw;
+}
+
+void receive_ac_current_command(const can_msg_t *message, ac_current_command_t *ac_current_command) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t current_target_ac_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_target_ac_bits = (data >> 0) & current_target_ac_mask;
+    int64_t current_target_ac_raw = (current_target_ac_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(current_target_ac_bits | ~current_target_ac_mask)
+        : (int64_t)current_target_ac_bits;
+    ac_current_command->current_target_ac = (float)(current_target_ac_raw / 10);
+}
+
+void receive_brake_current_command(const can_msg_t *message, brake_current_command_t *brake_current_command) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t brake_ac_current_mask = (1ULL << 16) - 1ULL;
+    uint64_t brake_ac_current_bits = (data >> 48) & brake_ac_current_mask;
+    int64_t brake_ac_current_raw = (brake_ac_current_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(brake_ac_current_bits | ~brake_ac_current_mask)
+        : (int64_t)brake_ac_current_bits;
+    brake_current_command->brake_ac_current = (float)(brake_ac_current_raw / 10);
+}
+
+void receive_max_ac_current_command(const can_msg_t *message, max_ac_current_command_t *max_ac_current_command) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t max_current_ac_target_mask = (1ULL << 16) - 1ULL;
+    uint64_t max_current_ac_target_bits = (data >> 48) & max_current_ac_target_mask;
+    int64_t max_current_ac_target_raw = (max_current_ac_target_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(max_current_ac_target_bits | ~max_current_ac_target_mask)
+        : (int64_t)max_current_ac_target_bits;
+    max_ac_current_command->max_current_ac_target = (float)(max_current_ac_target_raw / 10);
+}
+
+void receive_max_ac_brake_current_command(const can_msg_t *message, max_ac_brake_current_command_t *max_ac_brake_current_command) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t max_ac_brake_current_target_mask = (1ULL << 16) - 1ULL;
+    uint64_t max_ac_brake_current_target_bits = (data >> 48) & max_ac_brake_current_target_mask;
+    int64_t max_ac_brake_current_target_raw = (max_ac_brake_current_target_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(max_ac_brake_current_target_bits | ~max_ac_brake_current_target_mask)
+        : (int64_t)max_ac_brake_current_target_bits;
+    max_ac_brake_current_command->max_ac_brake_current_target = (float)(max_ac_brake_current_target_raw / 10);
+}
+
+void receive_max_dc_current_command(const can_msg_t *message, max_dc_current_command_t *max_dc_current_command) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t max_dc_current_target_mask = (1ULL << 16) - 1ULL;
+    uint64_t max_dc_current_target_bits = (data >> 0) & max_dc_current_target_mask;
+    int64_t max_dc_current_target_raw = (max_dc_current_target_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(max_dc_current_target_bits | ~max_dc_current_target_mask)
+        : (int64_t)max_dc_current_target_bits;
+    max_dc_current_command->max_dc_current_target = (float)(max_dc_current_target_raw / 10);
+}
+
+void receive_max_dc_brake_current_command(const can_msg_t *message, max_dc_brake_current_command_t *max_dc_brake_current_command) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t max_dc_brake_current_target_mask = (1ULL << 16) - 1ULL;
+    uint64_t max_dc_brake_current_target_bits = (data >> 0) & max_dc_brake_current_target_mask;
+    int64_t max_dc_brake_current_target_raw = (max_dc_brake_current_target_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(max_dc_brake_current_target_bits | ~max_dc_brake_current_target_mask)
+        : (int64_t)max_dc_brake_current_target_bits;
+    max_dc_brake_current_command->max_dc_brake_current_target = (float)(max_dc_brake_current_target_raw / 10);
+}
+
+void receive_drive_enable_command(const can_msg_t *message, drive_enable_command_t *drive_enable_command) {
+    
+    uint8_t data = message->data[0];
+    uint64_t drive_enable_mask = (1ULL << 8) - 1ULL;
+    uint64_t drive_enable_raw = (data >> 0) & drive_enable_mask;
+    drive_enable_command->drive_enable = (uint8_t)drive_enable_raw;
+}
+
+void receive_dashboard_efuse(const can_msg_t *message, dashboard_efuse_t *dashboard_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    dashboard_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    dashboard_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    dashboard_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    dashboard_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    dashboard_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    dashboard_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_brake_efuse(const can_msg_t *message, brake_efuse_t *brake_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    brake_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    brake_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    brake_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    brake_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    brake_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    brake_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_shutdown_efuse(const can_msg_t *message, shutdown_efuse_t *shutdown_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    shutdown_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    shutdown_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    shutdown_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    shutdown_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    shutdown_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    shutdown_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_lv_efuse(const can_msg_t *message, lv_efuse_t *lv_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    lv_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    lv_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    lv_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    lv_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    lv_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    lv_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_radfan_efuse(const can_msg_t *message, radfan_efuse_t *radfan_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    radfan_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    radfan_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    radfan_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    radfan_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    radfan_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    radfan_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_fanbatt_efuse(const can_msg_t *message, fanbatt_efuse_t *fanbatt_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    fanbatt_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    fanbatt_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    fanbatt_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    fanbatt_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    fanbatt_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    fanbatt_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_pumpone_efuse(const can_msg_t *message, pumpone_efuse_t *pumpone_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    pumpone_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    pumpone_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    pumpone_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    pumpone_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    pumpone_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    pumpone_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_pumptwo_efuse(const can_msg_t *message, pumptwo_efuse_t *pumptwo_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    pumptwo_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    pumptwo_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    pumptwo_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    pumptwo_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    pumptwo_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    pumptwo_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_battbox_efuse(const can_msg_t *message, battbox_efuse_t *battbox_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    battbox_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    battbox_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    battbox_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    battbox_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    battbox_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    battbox_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_mc_efuse(const can_msg_t *message, mc_efuse_t *mc_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    mc_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    mc_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    mc_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    mc_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    mc_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    mc_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_spare_efuse(const can_msg_t *message, spare_efuse_t *spare_efuse) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    spare_efuse->ADC = (uint16_t)ADC_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    spare_efuse->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_raw = (data >> 16) & current_mask;
+    spare_efuse->current = (float)(current_raw / 1000);
+    uint64_t is_faulted_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_faulted_raw = (data >> 12) & is_faulted_mask;
+    spare_efuse->is_faulted = (bool)is_faulted_raw;
+    uint64_t is_enabled_mask = (1ULL << 4) - 1ULL;
+    uint64_t is_enabled_raw = (data >> 8) & is_enabled_mask;
+    spare_efuse->is_enabled = (bool)is_enabled_raw;
+    uint64_t control_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t control_state_raw = (data >> 0) & control_state_mask;
+    spare_efuse->control_state = (uint8_t)control_state_raw;
+}
+
+void receive_shutdown_pins(const can_msg_t *message, shutdown_pins_t *shutdown_pins) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t bms_gpio_mask = (1ULL << 1) - 1ULL;
+    uint64_t bms_gpio_raw = (data >> 15) & bms_gpio_mask;
+    shutdown_pins->bms_gpio = (bool)bms_gpio_raw;
+    uint64_t bots_gpio_mask = (1ULL << 1) - 1ULL;
+    uint64_t bots_gpio_raw = (data >> 14) & bots_gpio_mask;
+    shutdown_pins->bots_gpio = (bool)bots_gpio_raw;
+    uint64_t spare_gpio_mask = (1ULL << 1) - 1ULL;
+    uint64_t spare_gpio_raw = (data >> 13) & spare_gpio_mask;
+    shutdown_pins->spare_gpio = (bool)spare_gpio_raw;
+    uint64_t bspd_gpio_mask = (1ULL << 1) - 1ULL;
+    uint64_t bspd_gpio_raw = (data >> 12) & bspd_gpio_mask;
+    shutdown_pins->bspd_gpio = (bool)bspd_gpio_raw;
+    uint64_t hv_c_mask = (1ULL << 1) - 1ULL;
+    uint64_t hv_c_raw = (data >> 11) & hv_c_mask;
+    shutdown_pins->hv_c = (bool)hv_c_raw;
+    uint64_t hvd_gpio_mask = (1ULL << 1) - 1ULL;
+    uint64_t hvd_gpio_raw = (data >> 10) & hvd_gpio_mask;
+    shutdown_pins->hvd_gpio = (bool)hvd_gpio_raw;
+    uint64_t imd_gpio_mask = (1ULL << 1) - 1ULL;
+    uint64_t imd_gpio_raw = (data >> 9) & imd_gpio_mask;
+    shutdown_pins->imd_gpio = (bool)imd_gpio_raw;
+    uint64_t ckpt_gpio_mask = (1ULL << 1) - 1ULL;
+    uint64_t ckpt_gpio_raw = (data >> 8) & ckpt_gpio_mask;
+    shutdown_pins->ckpt_gpio = (bool)ckpt_gpio_raw;
+    uint64_t inertia_sw_gpio_mask = (1ULL << 1) - 1ULL;
+    uint64_t inertia_sw_gpio_raw = (data >> 7) & inertia_sw_gpio_mask;
+    shutdown_pins->inertia_sw_gpio = (bool)inertia_sw_gpio_raw;
+    uint64_t tsms_gpio_mask = (1ULL << 1) - 1ULL;
+    uint64_t tsms_gpio_raw = (data >> 6) & tsms_gpio_mask;
+    shutdown_pins->tsms_gpio = (bool)tsms_gpio_raw;
+    uint64_t UNUSED_mask = (1ULL << 6) - 1ULL;
+    uint64_t UNUSED_raw = (data >> 0) & UNUSED_mask;
+    shutdown_pins->UNUSED = (uint8_t)UNUSED_raw;
+}
+
+void receive_car_state(const can_msg_t *message, car_state_t *car_state) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t home_mode_mask = (1ULL << 4) - 1ULL;
+    uint64_t home_mode_raw = (data >> 60) & home_mode_mask;
+    car_state->home_mode = (bool)home_mode_raw;
+    uint64_t nero_index_mask = (1ULL << 4) - 1ULL;
+    uint64_t nero_index_raw = (data >> 56) & nero_index_mask;
+    car_state->nero_index = (uint8_t)nero_index_raw;
+    uint64_t car_speed_mask = (1ULL << 16) - 1ULL;
+    uint64_t car_speed_bits = (data >> 40) & car_speed_mask;
+    int64_t car_speed_raw = (car_speed_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(car_speed_bits | ~car_speed_mask)
+        : (int64_t)car_speed_bits;
+    car_state->car_speed = (float)(car_speed_raw / 10);
+    uint64_t tsms_mask = (1ULL << 1) - 1ULL;
+    uint64_t tsms_raw = (data >> 39) & tsms_mask;
+    car_state->tsms = (bool)tsms_raw;
+    uint64_t torque_limit_percentage_mask = (1ULL << 7) - 1ULL;
+    uint64_t torque_limit_percentage_raw = (data >> 32) & torque_limit_percentage_mask;
+    car_state->torque_limit_percentage = (float)(torque_limit_percentage_raw / 100);
+    uint64_t reverse_mask = (1ULL << 1) - 1ULL;
+    uint64_t reverse_raw = (data >> 31) & reverse_mask;
+    car_state->reverse = (bool)reverse_raw;
+    uint64_t regen_limit_mask = (1ULL << 10) - 1ULL;
+    uint64_t regen_limit_raw = (data >> 21) & regen_limit_mask;
+    car_state->regen_limit = (uint16_t)regen_limit_raw;
+    uint64_t launch_control_mask = (1ULL << 1) - 1ULL;
+    uint64_t launch_control_raw = (data >> 20) & launch_control_mask;
+    car_state->launch_control = (bool)launch_control_raw;
+    uint64_t functional_state_mask = (1ULL << 3) - 1ULL;
+    uint64_t functional_state_raw = (data >> 17) & functional_state_mask;
+    car_state->functional_state = (uint8_t)functional_state_raw;
+    uint64_t traction_control_mask = (1ULL << 1) - 1ULL;
+    uint64_t traction_control_raw = (data >> 16) & traction_control_mask;
+    car_state->traction_control = (bool)traction_control_raw;
+}
+
+void receive_pedal_percent_pressed_values(const can_msg_t *message, pedal_percent_pressed_values_t *pedal_percent_pressed_values) {
+    
+    uint32_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 4);
+    uint32_t data = __builtin_bswap32(data_bigendian);
+    uint64_t accel_norm_mask = (1ULL << 16) - 1ULL;
+    uint64_t accel_norm_raw = (data >> 16) & accel_norm_mask;
+    pedal_percent_pressed_values->accel_norm = (float)(accel_norm_raw / 100);
+    uint64_t brake_norm_mask = (1ULL << 16) - 1ULL;
+    uint64_t brake_norm_raw = (data >> 0) & brake_norm_mask;
+    pedal_percent_pressed_values->brake_norm = (float)(brake_norm_raw / 100);
+}
+
+void receive_pedal_sensor_voltages(const can_msg_t *message, pedal_sensor_voltages_t *pedal_sensor_voltages) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t accel1_volts_mask = (1ULL << 16) - 1ULL;
+    uint64_t accel1_volts_raw = (data >> 48) & accel1_volts_mask;
+    pedal_sensor_voltages->accel1_volts = (float)(accel1_volts_raw / 100);
+    uint64_t accel2_volts_mask = (1ULL << 16) - 1ULL;
+    uint64_t accel2_volts_raw = (data >> 32) & accel2_volts_mask;
+    pedal_sensor_voltages->accel2_volts = (float)(accel2_volts_raw / 100);
+    uint64_t brake1_volts_mask = (1ULL << 16) - 1ULL;
+    uint64_t brake1_volts_raw = (data >> 16) & brake1_volts_mask;
+    pedal_sensor_voltages->brake1_volts = (float)(brake1_volts_raw / 100);
+    uint64_t brake2_volts_mask = (1ULL << 16) - 1ULL;
+    uint64_t brake2_volts_raw = (data >> 0) & brake2_volts_mask;
+    pedal_sensor_voltages->brake2_volts = (float)(brake2_volts_raw / 100);
+}
+
+void receive_lightning_board_light_status(const can_msg_t *message, lightning_board_light_status_t *lightning_board_light_status) {
+    
+    uint8_t data = message->data[0];
+    uint64_t status_mask = (1ULL << 2) - 1ULL;
+    uint64_t status_raw = (data >> 6) & status_mask;
+    lightning_board_light_status->status = (uint8_t)status_raw;
+}
+
+void receive_temperature_sensor(const can_msg_t *message, temperature_sensor_t *temperature_sensor) {
+    
+    uint32_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 4);
+    uint32_t data = __builtin_bswap32(data_bigendian);
+    uint64_t vcu_temperature_mask = (1ULL << 16) - 1ULL;
+    uint64_t vcu_temperature_bits = (data >> 16) & vcu_temperature_mask;
+    int64_t vcu_temperature_raw = (vcu_temperature_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(vcu_temperature_bits | ~vcu_temperature_mask)
+        : (int64_t)vcu_temperature_bits;
+    temperature_sensor->vcu_temperature = (float)(vcu_temperature_raw / 100);
+    uint64_t vcu_humidity_mask = (1ULL << 16) - 1ULL;
+    uint64_t vcu_humidity_raw = (data >> 0) & vcu_humidity_mask;
+    temperature_sensor->vcu_humidity = (float)(vcu_humidity_raw / 100);
+}
+
+void receive_imu_accelerometer(const can_msg_t *message, imu_accelerometer_t *imu_accelerometer) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t imu_accelerometer_x_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_accelerometer_x_bits = (data >> 48) & imu_accelerometer_x_mask;
+    int64_t imu_accelerometer_x_raw = (imu_accelerometer_x_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_accelerometer_x_bits | ~imu_accelerometer_x_mask)
+        : (int64_t)imu_accelerometer_x_bits;
+    imu_accelerometer->imu_accelerometer_x = (float)(imu_accelerometer_x_raw / 4);
+    uint64_t imu_accelerometer_y_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_accelerometer_y_bits = (data >> 32) & imu_accelerometer_y_mask;
+    int64_t imu_accelerometer_y_raw = (imu_accelerometer_y_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_accelerometer_y_bits | ~imu_accelerometer_y_mask)
+        : (int64_t)imu_accelerometer_y_bits;
+    imu_accelerometer->imu_accelerometer_y = (float)(imu_accelerometer_y_raw / 4);
+    uint64_t imu_accelerometer_z_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_accelerometer_z_bits = (data >> 16) & imu_accelerometer_z_mask;
+    int64_t imu_accelerometer_z_raw = (imu_accelerometer_z_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_accelerometer_z_bits | ~imu_accelerometer_z_mask)
+        : (int64_t)imu_accelerometer_z_bits;
+    imu_accelerometer->imu_accelerometer_z = (float)(imu_accelerometer_z_raw / 4);
+}
+
+void receive_imu_gyro(const can_msg_t *message, imu_gyro_t *imu_gyro) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t imu_gyro_x_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_gyro_x_bits = (data >> 48) & imu_gyro_x_mask;
+    int64_t imu_gyro_x_raw = (imu_gyro_x_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_gyro_x_bits | ~imu_gyro_x_mask)
+        : (int64_t)imu_gyro_x_bits;
+    imu_gyro->imu_gyro_x = (float)(imu_gyro_x_raw / 100);
+    uint64_t imu_gyro_y_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_gyro_y_bits = (data >> 32) & imu_gyro_y_mask;
+    int64_t imu_gyro_y_raw = (imu_gyro_y_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_gyro_y_bits | ~imu_gyro_y_mask)
+        : (int64_t)imu_gyro_y_bits;
+    imu_gyro->imu_gyro_y = (float)(imu_gyro_y_raw / 100);
+    uint64_t imu_gyro_z_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_gyro_z_bits = (data >> 16) & imu_gyro_z_mask;
+    int64_t imu_gyro_z_raw = (imu_gyro_z_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_gyro_z_bits | ~imu_gyro_z_mask)
+        : (int64_t)imu_gyro_z_bits;
+    imu_gyro->imu_gyro_z = (float)(imu_gyro_z_raw / 100);
+}
+
+void receive_faults(const can_msg_t *message, faults_t *faults) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t CAN_OUTGOING_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t CAN_OUTGOING_FAULT_raw = (data >> 15) & CAN_OUTGOING_FAULT_mask;
+    faults->CAN_OUTGOING_FAULT = (bool)CAN_OUTGOING_FAULT_raw;
+    uint64_t CAN_INCOMING_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t CAN_INCOMING_FAULT_raw = (data >> 14) & CAN_INCOMING_FAULT_mask;
+    faults->CAN_INCOMING_FAULT = (bool)CAN_INCOMING_FAULT_raw;
+    uint64_t BMS_CAN_MONITOR_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t BMS_CAN_MONITOR_FAULT_raw = (data >> 13) & BMS_CAN_MONITOR_FAULT_mask;
+    faults->BMS_CAN_MONITOR_FAULT = (bool)BMS_CAN_MONITOR_FAULT_raw;
+    uint64_t LIGHTNING_CAN_MONITOR_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t LIGHTNING_CAN_MONITOR_FAULT_raw = (data >> 12) & LIGHTNING_CAN_MONITOR_FAULT_mask;
+    faults->LIGHTNING_CAN_MONITOR_FAULT = (bool)LIGHTNING_CAN_MONITOR_FAULT_raw;
+    uint64_t SHUTDOWN_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t SHUTDOWN_FAULT_raw = (data >> 11) & SHUTDOWN_FAULT_mask;
+    faults->SHUTDOWN_FAULT = (bool)SHUTDOWN_FAULT_raw;
+    uint64_t ONBOARD_TEMP_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t ONBOARD_TEMP_FAULT_raw = (data >> 10) & ONBOARD_TEMP_FAULT_mask;
+    faults->ONBOARD_TEMP_FAULT = (bool)ONBOARD_TEMP_FAULT_raw;
+    uint64_t IMU_ACCEL_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t IMU_ACCEL_FAULT_raw = (data >> 9) & IMU_ACCEL_FAULT_mask;
+    faults->IMU_ACCEL_FAULT = (bool)IMU_ACCEL_FAULT_raw;
+    uint64_t IMU_GYRO_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t IMU_GYRO_FAULT_raw = (data >> 8) & IMU_GYRO_FAULT_mask;
+    faults->IMU_GYRO_FAULT = (bool)IMU_GYRO_FAULT_raw;
+    uint64_t BSPD_PREFAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t BSPD_PREFAULT_raw = (data >> 7) & BSPD_PREFAULT_mask;
+    faults->BSPD_PREFAULT = (bool)BSPD_PREFAULT_raw;
+    uint64_t ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_raw = (data >> 6) & ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_mask;
+    faults->ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT = (bool)ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_raw;
+    uint64_t ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_raw = (data >> 5) & ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_mask;
+    faults->ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT = (bool)ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_raw;
+    uint64_t ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_raw = (data >> 4) & ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_mask;
+    faults->ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT = (bool)ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_raw;
+    uint64_t ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_raw = (data >> 3) & ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_mask;
+    faults->ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT = (bool)ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_raw;
+    uint64_t ONBOARD_PEDAL_DIFFERENCE_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t ONBOARD_PEDAL_DIFFERENCE_FAULT_raw = (data >> 2) & ONBOARD_PEDAL_DIFFERENCE_FAULT_mask;
+    faults->ONBOARD_PEDAL_DIFFERENCE_FAULT = (bool)ONBOARD_PEDAL_DIFFERENCE_FAULT_raw;
+    uint64_t RTDS_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t RTDS_FAULT_raw = (data >> 1) & RTDS_FAULT_mask;
+    faults->RTDS_FAULT = (bool)RTDS_FAULT_raw;
+    uint64_t LV_LOW_VOLTAGE_FAULT_mask = (1ULL << 1) - 1ULL;
+    uint64_t LV_LOW_VOLTAGE_FAULT_raw = (data >> 0) & LV_LOW_VOLTAGE_FAULT_mask;
+    faults->LV_LOW_VOLTAGE_FAULT = (bool)LV_LOW_VOLTAGE_FAULT_raw;
+}
+
+void receive_lv_voltage(const can_msg_t *message, lv_voltage_t *lv_voltage) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t ADC_mask = (1ULL << 16) - 1ULL;
+    uint64_t ADC_raw = (data >> 48) & ADC_mask;
+    lv_voltage->ADC = (uint16_t)ADC_raw;
+    uint64_t Voltage_mask = (1ULL << 32) - 1ULL;
+    uint64_t Voltage_raw = (data >> 16) & Voltage_mask;
+    lv_voltage->Voltage = (float)(Voltage_raw / 1000);
+}
+
+void receive_vcu_test_message(const can_msg_t *message, vcu_test_message_t *vcu_test_message) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t three_bits_mask = (1ULL << 3) - 1ULL;
+    uint64_t three_bits_raw = (data >> 61) & three_bits_mask;
+    vcu_test_message->three_bits = (uint8_t)three_bits_raw;
+    uint64_t float_value_mask = (1ULL << 32) - 1ULL;
+    uint64_t float_value_bits = (data >> 29) & float_value_mask;
+    int64_t float_value_raw = (float_value_bits & (1ULL << (32 - 1)))
+        ? (int64_t)(float_value_bits | ~float_value_mask)
+        : (int64_t)float_value_bits;
+    vcu_test_message->float_value = (float)(float_value_raw / 100);
+    uint64_t five_bits_mask = (1ULL << 5) - 1ULL;
+    uint64_t five_bits_raw = (data >> 24) & five_bits_mask;
+    vcu_test_message->five_bits = (uint8_t)five_bits_raw;
+    uint64_t sixteen_bits_mask = (1ULL << 16) - 1ULL;
+    uint64_t sixteen_bits_raw = (data >> 8) & sixteen_bits_mask;
+    vcu_test_message->sixteen_bits = (uint16_t)sixteen_bits_raw;
+    uint64_t signed_8_bits_mask = (1ULL << 8) - 1ULL;
+    uint64_t signed_8_bits_bits = (data >> 0) & signed_8_bits_mask;
+    int64_t signed_8_bits_raw = (signed_8_bits_bits & (1ULL << (8 - 1)))
+        ? (int64_t)(signed_8_bits_bits | ~signed_8_bits_mask)
+        : (int64_t)signed_8_bits_bits;
+    vcu_test_message->signed_8_bits = (int8_t)signed_8_bits_raw;
+}
+
+void receive_dti_motor_temp_as_reported_by_vcu(const can_msg_t *message, dti_motor_temp_as_reported_by_vcu_t *dti_motor_temp_as_reported_by_vcu) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t temp_mask = (1ULL << 16) - 1ULL;
+    uint64_t temp_raw = (data >> 0) & temp_mask;
+    dti_motor_temp_as_reported_by_vcu->temp = (uint16_t)temp_raw;
+}
+
+void receive_dti_controller_temp_as_reported_by_vcu(const can_msg_t *message, dti_controller_temp_as_reported_by_vcu_t *dti_controller_temp_as_reported_by_vcu) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t temp_mask = (1ULL << 16) - 1ULL;
+    uint64_t temp_raw = (data >> 0) & temp_mask;
+    dti_controller_temp_as_reported_by_vcu->temp = (uint16_t)temp_raw;
+}
+
+void receive_bms_battbox_temp_as_reported_by_vcu(const can_msg_t *message, bms_battbox_temp_as_reported_by_vcu_t *bms_battbox_temp_as_reported_by_vcu) {
+    
+    uint32_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 4);
+    uint32_t data = __builtin_bswap32(data_bigendian);
+    uint64_t temp_mask = (1ULL << 32) - 1ULL;
+    uint64_t temp_bits = (data >> 0) & temp_mask;
+    int64_t temp_raw = (temp_bits & (1ULL << (32 - 1)))
+        ? (int64_t)(temp_bits | ~temp_mask)
+        : (int64_t)temp_bits;
+    bms_battbox_temp_as_reported_by_vcu->temp = (float)(temp_raw / 100);
+}
+
+void receive_brake_state_as_reported_by_vcu(const can_msg_t *message, brake_state_as_reported_by_vcu_t *brake_state_as_reported_by_vcu) {
+    
+    uint8_t data = message->data[0];
+    uint64_t brake_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t brake_state_bits = (data >> 0) & brake_state_mask;
+    int64_t brake_state_raw = (brake_state_bits & (1ULL << (8 - 1)))
+        ? (int64_t)(brake_state_bits | ~brake_state_mask)
+        : (int64_t)brake_state_bits;
+    brake_state_as_reported_by_vcu->brake_state = (bool)(brake_state_raw / 100);
+}
+
+void receive_rtds_state_message(const can_msg_t *message, rtds_state_message_t *rtds_state_message) {
+    
+    uint32_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 4);
+    uint32_t data = __builtin_bswap32(data_bigendian);
+    uint64_t pin_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t pin_state_raw = (data >> 24) & pin_state_mask;
+    rtds_state_message->pin_state = (bool)pin_state_raw;
+    uint64_t sounding_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t sounding_state_raw = (data >> 16) & sounding_state_mask;
+    rtds_state_message->sounding_state = (bool)sounding_state_raw;
+    uint64_t reverse_state_mask = (1ULL << 8) - 1ULL;
+    uint64_t reverse_state_raw = (data >> 8) & reverse_state_mask;
+    rtds_state_message->reverse_state = (bool)reverse_state_raw;
+    uint64_t error_mask = (1ULL << 8) - 1ULL;
+    uint64_t error_raw = (data >> 0) & error_mask;
+    rtds_state_message->error = (bool)error_raw;
+}
+
+void receive_lfiu_low_current_adc_readings(const can_msg_t *message, lfiu_low_current_adc_readings_t *lfiu_low_current_adc_readings) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t raw_mask = (1ULL << 16) - 1ULL;
+    uint64_t raw_raw = (data >> 48) & raw_mask;
+    lfiu_low_current_adc_readings->raw = (uint16_t)raw_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    lfiu_low_current_adc_readings->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_bits = (data >> 16) & current_mask;
+    int64_t current_raw = (current_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(current_bits | ~current_mask)
+        : (int64_t)current_bits;
+    lfiu_low_current_adc_readings->current = (float)(current_raw / 1000);
+}
+
+void receive_lfiu_high_current_adc_readings(const can_msg_t *message, lfiu_high_current_adc_readings_t *lfiu_high_current_adc_readings) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t raw_mask = (1ULL << 16) - 1ULL;
+    uint64_t raw_raw = (data >> 48) & raw_mask;
+    lfiu_high_current_adc_readings->raw = (uint16_t)raw_raw;
+    uint64_t voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t voltage_raw = (data >> 32) & voltage_mask;
+    lfiu_high_current_adc_readings->voltage = (float)(voltage_raw / 1000);
+    uint64_t current_mask = (1ULL << 16) - 1ULL;
+    uint64_t current_bits = (data >> 16) & current_mask;
+    int64_t current_raw = (current_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(current_bits | ~current_mask)
+        : (int64_t)current_bits;
+    lfiu_high_current_adc_readings->current = (float)(current_raw / 100);
+}
+
+void receive_second_vcu_test_message(const can_msg_t *message, second_vcu_test_message_t *second_vcu_test_message) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t one_mask = (1ULL << 14) - 1ULL;
+    uint64_t one_raw = (data >> 50) & one_mask;
+    second_vcu_test_message->one = (uint16_t)one_raw;
+    uint64_t two_mask = (1ULL << 2) - 1ULL;
+    uint64_t two_raw = (data >> 48) & two_mask;
+    second_vcu_test_message->two = (uint8_t)two_raw;
+    uint64_t three_mask = (1ULL << 2) - 1ULL;
+    uint64_t three_raw = (data >> 46) & three_mask;
+    second_vcu_test_message->three = (uint8_t)three_raw;
+    uint64_t four_mask = (1ULL << 1) - 1ULL;
+    uint64_t four_raw = (data >> 45) & four_mask;
+    second_vcu_test_message->four = (bool)four_raw;
+    uint64_t five_mask = (1ULL << 6) - 1ULL;
+    uint64_t five_raw = (data >> 39) & five_mask;
+    second_vcu_test_message->five = (uint8_t)five_raw;
+    uint64_t six_mask = (1ULL << 23) - 1ULL;
+    uint64_t six_raw = (data >> 16) & six_mask;
+    second_vcu_test_message->six = (uint32_t)six_raw;
+}
+
+void receive_lv_box_fan_pwm(const can_msg_t *message, lv_box_fan_pwm_t *lv_box_fan_pwm) {
+    
+    uint8_t data = message->data[0];
+    uint64_t fan_pwm_percentage_mask = (1ULL << 8) - 1ULL;
+    uint64_t fan_pwm_percentage_raw = (data >> 0) & fan_pwm_percentage_mask;
+    lv_box_fan_pwm->fan_pwm_percentage = (uint8_t)fan_pwm_percentage_raw;
+}
+
+void receive_bms_shutdown_status_as_reported_by_vcu(const can_msg_t *message, bms_shutdown_status_as_reported_by_vcu_t *bms_shutdown_status_as_reported_by_vcu) {
+    
+    uint8_t data = message->data[0];
+    uint64_t bms_shutdown_as_reported_by_vcu_mask = (1ULL << 8) - 1ULL;
+    uint64_t bms_shutdown_as_reported_by_vcu_raw = (data >> 0) & bms_shutdown_as_reported_by_vcu_mask;
+    bms_shutdown_status_as_reported_by_vcu->bms_shutdown_as_reported_by_vcu = (bool)bms_shutdown_as_reported_by_vcu_raw;
+}
+
+void receive_shepherd_bms_fan_percent(const can_msg_t *message, shepherd_bms_fan_percent_t *shepherd_bms_fan_percent) {
+    
+    uint8_t data = message->data[0];
+    uint64_t pwm_duty_mask = (1ULL << 8) - 1ULL;
+    uint64_t pwm_duty_raw = (data >> 0) & pwm_duty_mask;
+    shepherd_bms_fan_percent->pwm_duty = (uint8_t)pwm_duty_raw;
+}
+
+void receive_dashboard_efuse_state(const can_msg_t *message, dashboard_efuse_state_t *dashboard_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    dashboard_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_brake_efuse_state(const can_msg_t *message, brake_efuse_state_t *brake_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    brake_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_shutdown_efuse_state(const can_msg_t *message, shutdown_efuse_state_t *shutdown_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    shutdown_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_lv_efuse_state(const can_msg_t *message, lv_efuse_state_t *lv_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    lv_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_radfan_efuse_state(const can_msg_t *message, radfan_efuse_state_t *radfan_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    radfan_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_fanbatt_efuse_state(const can_msg_t *message, fanbatt_efuse_state_t *fanbatt_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    fanbatt_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_pumpone_efuse_state(const can_msg_t *message, pumpone_efuse_state_t *pumpone_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    pumpone_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_pumptwo_efuse_state(const can_msg_t *message, pumptwo_efuse_state_t *pumptwo_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    pumptwo_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_battbox_efuse_state(const can_msg_t *message, battbox_efuse_state_t *battbox_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    battbox_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_mc_efuse_state(const can_msg_t *message, mc_efuse_state_t *mc_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    mc_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_spare_efuse_state(const can_msg_t *message, spare_efuse_state_t *spare_efuse_state) {
+    
+    uint8_t data = message->data[0];
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 0) & state_mask;
+    spare_efuse_state->state = (uint8_t)state_raw;
+}
+
+void receive_rtds_command_message(const can_msg_t *message, rtds_command_message_t *rtds_command_message) {
+    
+    uint8_t data = message->data[0];
+    uint64_t command_mask = (1ULL << 8) - 1ULL;
+    uint64_t command_raw = (data >> 0) & command_mask;
+    rtds_command_message->command = (uint8_t)command_raw;
+}
+
+void receive_imd_general_information(const can_msg_t *message, imd_general_information_t *imd_general_information) {
+    
+    struct __attribute__((__packed__)) {
+        uint16_t R_iso_corrected;
+        uint8_t R_iso_status;
+        uint8_t Iso_measurement_counter;
+        uint8_t device_error;
+        uint8_t HV_pos_conn_fail;
+        uint8_t HV_neg_conn_fail;
+        uint8_t Earth_conn_fail;
+        uint8_t Iso_alarm;
+        uint8_t iso_warning;
+        uint8_t iso_outdated;
+        uint8_t Unbalance_alarm;
+        uint8_t Undervoltage_alarm;
+        uint8_t Unsafe_to_start;
+        uint8_t Earthlift_Open;
+        uint8_t warnings_and_alarms_unused_bits;
+        uint8_t Device_Activity;
+        uint8_t Not_Applicable;
+        
+    } bitstream_data;
+
+    memcpy(&bitstream_data, message->data, sizeof(bitstream_data));
+
+    
+    
+    imd_general_information->R_iso_corrected = (uint16_t)bitstream_data.R_iso_corrected;
+    
+    
+    
+    imd_general_information->R_iso_status = (uint8_t)bitstream_data.R_iso_status;
+    
+    
+    
+    imd_general_information->Iso_measurement_counter = (uint8_t)bitstream_data.Iso_measurement_counter;
+    
+    
+    
+    imd_general_information->device_error = (bool)bitstream_data.device_error;
+    
+    
+    
+    imd_general_information->HV_pos_conn_fail = (bool)bitstream_data.HV_pos_conn_fail;
+    
+    
+    
+    imd_general_information->HV_neg_conn_fail = (bool)bitstream_data.HV_neg_conn_fail;
+    
+    
+    
+    imd_general_information->Earth_conn_fail = (bool)bitstream_data.Earth_conn_fail;
+    
+    
+    
+    imd_general_information->Iso_alarm = (bool)bitstream_data.Iso_alarm;
+    
+    
+    
+    imd_general_information->iso_warning = (bool)bitstream_data.iso_warning;
+    
+    
+    
+    imd_general_information->iso_outdated = (bool)bitstream_data.iso_outdated;
+    
+    
+    
+    imd_general_information->Unbalance_alarm = (bool)bitstream_data.Unbalance_alarm;
+    
+    
+    
+    imd_general_information->Undervoltage_alarm = (bool)bitstream_data.Undervoltage_alarm;
+    
+    
+    
+    imd_general_information->Unsafe_to_start = (bool)bitstream_data.Unsafe_to_start;
+    
+    
+    
+    imd_general_information->Earthlift_Open = (bool)bitstream_data.Earthlift_Open;
+    
+    
+    
+    imd_general_information->warnings_and_alarms_unused_bits = (uint8_t)bitstream_data.warnings_and_alarms_unused_bits;
+    
+    
+    
+    imd_general_information->Device_Activity = (uint8_t)bitstream_data.Device_Activity;
+    
+    
+    
+    imd_general_information->Not_Applicable = (uint8_t)bitstream_data.Not_Applicable;
+    
+    
+}
+
+void receive_wheel_buttons(const can_msg_t *message, wheel_buttons_t *wheel_buttons) {
+    
+    uint8_t data = message->data[0];
+    uint64_t button_id_mask = (1ULL << 8) - 1ULL;
+    uint64_t button_id_raw = (data >> 0) & button_id_mask;
+    wheel_buttons->button_id = (uint8_t)button_id_raw;
+}
+
+void receive_bms_charge_message_send(const can_msg_t *message, bms_charge_message_send_t *bms_charge_message_send) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t charge_volts_mask = (1ULL << 16) - 1ULL;
+    uint64_t charge_volts_raw = (data >> 48) & charge_volts_mask;
+    bms_charge_message_send->charge_volts = (float)(charge_volts_raw / 10);
+    uint64_t charge_current_mask = (1ULL << 16) - 1ULL;
+    uint64_t charge_current_raw = (data >> 32) & charge_current_mask;
+    bms_charge_message_send->charge_current = (float)(charge_current_raw / 10);
+    uint64_t enable_charging_mask = (1ULL << 8) - 1ULL;
+    uint64_t enable_charging_raw = (data >> 24) & enable_charging_mask;
+    bms_charge_message_send->enable_charging = (uint8_t)enable_charging_raw;
+}
+
+void receive_bms_status(const can_msg_t *message, bms_status_t *bms_status) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 8) & state_mask;
+    bms_status->state = (uint8_t)state_raw;
+    uint64_t temp_average_mask = (1ULL << 8) - 1ULL;
+    uint64_t temp_average_raw = (data >> 0) & temp_average_mask;
+    bms_status->temp_average = (float)temp_average_raw;
+}
+
+void receive_cell_voltage(const can_msg_t *message, cell_voltage_t *cell_voltage) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t high_val_mask = (1ULL << 16) - 1ULL;
+    uint64_t high_val_raw = (data >> 48) & high_val_mask;
+    cell_voltage->high_val = (float)(high_val_raw / 10000);
+    uint64_t high_chip_mask = (1ULL << 4) - 1ULL;
+    uint64_t high_chip_raw = (data >> 44) & high_chip_mask;
+    cell_voltage->high_chip = (uint8_t)high_chip_raw;
+    uint64_t high_cell_mask = (1ULL << 4) - 1ULL;
+    uint64_t high_cell_raw = (data >> 40) & high_cell_mask;
+    cell_voltage->high_cell = (uint8_t)high_cell_raw;
+    uint64_t low_val_mask = (1ULL << 16) - 1ULL;
+    uint64_t low_val_raw = (data >> 24) & low_val_mask;
+    cell_voltage->low_val = (float)(low_val_raw / 10000);
+    uint64_t low_chip_mask = (1ULL << 4) - 1ULL;
+    uint64_t low_chip_raw = (data >> 20) & low_chip_mask;
+    cell_voltage->low_chip = (uint8_t)low_chip_raw;
+    uint64_t low_cell_mask = (1ULL << 4) - 1ULL;
+    uint64_t low_cell_raw = (data >> 16) & low_cell_mask;
+    cell_voltage->low_cell = (uint8_t)low_cell_raw;
+    uint64_t avg_val_mask = (1ULL << 16) - 1ULL;
+    uint64_t avg_val_raw = (data >> 0) & avg_val_mask;
+    cell_voltage->avg_val = (float)(avg_val_raw / 10000);
+}
+
+void receive_cell_temperatures(const can_msg_t *message, cell_temperatures_t *cell_temperatures) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t high_val_mask = (1ULL << 16) - 1ULL;
+    uint64_t high_val_raw = (data >> 48) & high_val_mask;
+    cell_temperatures->high_val = (float)(high_val_raw / 100);
+    uint64_t high_chip_mask = (1ULL << 4) - 1ULL;
+    uint64_t high_chip_raw = (data >> 44) & high_chip_mask;
+    cell_temperatures->high_chip = (uint8_t)high_chip_raw;
+    uint64_t high_cell_mask = (1ULL << 4) - 1ULL;
+    uint64_t high_cell_raw = (data >> 40) & high_cell_mask;
+    cell_temperatures->high_cell = (uint8_t)high_cell_raw;
+    uint64_t low_val_mask = (1ULL << 16) - 1ULL;
+    uint64_t low_val_raw = (data >> 24) & low_val_mask;
+    cell_temperatures->low_val = (float)(low_val_raw / 100);
+    uint64_t low_chip_mask = (1ULL << 4) - 1ULL;
+    uint64_t low_chip_raw = (data >> 20) & low_chip_mask;
+    cell_temperatures->low_chip = (uint8_t)low_chip_raw;
+    uint64_t low_cell_mask = (1ULL << 4) - 1ULL;
+    uint64_t low_cell_raw = (data >> 16) & low_cell_mask;
+    cell_temperatures->low_cell = (uint8_t)low_cell_raw;
+    uint64_t avg_val_mask = (1ULL << 16) - 1ULL;
+    uint64_t avg_val_raw = (data >> 0) & avg_val_mask;
+    cell_temperatures->avg_val = (float)(avg_val_raw / 100);
+}
+
+void receive_segment_temperatures(const can_msg_t *message, segment_temperatures_t *segment_temperatures) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t seg1_mask = (1ULL << 8) - 1ULL;
+    uint64_t seg1_bits = (data >> 56) & seg1_mask;
+    int64_t seg1_raw = (seg1_bits & (1ULL << (8 - 1)))
+        ? (int64_t)(seg1_bits | ~seg1_mask)
+        : (int64_t)seg1_bits;
+    segment_temperatures->seg1 = (float)seg1_raw;
+    uint64_t seg2_mask = (1ULL << 8) - 1ULL;
+    uint64_t seg2_bits = (data >> 48) & seg2_mask;
+    int64_t seg2_raw = (seg2_bits & (1ULL << (8 - 1)))
+        ? (int64_t)(seg2_bits | ~seg2_mask)
+        : (int64_t)seg2_bits;
+    segment_temperatures->seg2 = (float)seg2_raw;
+    uint64_t seg3_mask = (1ULL << 8) - 1ULL;
+    uint64_t seg3_bits = (data >> 40) & seg3_mask;
+    int64_t seg3_raw = (seg3_bits & (1ULL << (8 - 1)))
+        ? (int64_t)(seg3_bits | ~seg3_mask)
+        : (int64_t)seg3_bits;
+    segment_temperatures->seg3 = (float)seg3_raw;
+    uint64_t seg4_mask = (1ULL << 8) - 1ULL;
+    uint64_t seg4_bits = (data >> 32) & seg4_mask;
+    int64_t seg4_raw = (seg4_bits & (1ULL << (8 - 1)))
+        ? (int64_t)(seg4_bits | ~seg4_mask)
+        : (int64_t)seg4_bits;
+    segment_temperatures->seg4 = (float)seg4_raw;
+    uint64_t seg5_mask = (1ULL << 8) - 1ULL;
+    uint64_t seg5_bits = (data >> 24) & seg5_mask;
+    int64_t seg5_raw = (seg5_bits & (1ULL << (8 - 1)))
+        ? (int64_t)(seg5_bits | ~seg5_mask)
+        : (int64_t)seg5_bits;
+    segment_temperatures->seg5 = (float)seg5_raw;
+}
+
+void receive_segment_isospi_communication_status(const can_msg_t *message, segment_isospi_communication_status_t *segment_isospi_communication_status) {
+    
+    uint32_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 4);
+    uint32_t data = __builtin_bswap32(data_bigendian);
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 24) & state_mask;
+    segment_isospi_communication_status->state = (uint8_t)state_raw;
+    uint64_t break_location_mask = (1ULL << 8) - 1ULL;
+    uint64_t break_location_raw = (data >> 16) & break_location_mask;
+    segment_isospi_communication_status->break_location = (uint8_t)break_location_raw;
+    uint64_t verification_attempts_mask = (1ULL << 8) - 1ULL;
+    uint64_t verification_attempts_raw = (data >> 8) & verification_attempts_mask;
+    segment_isospi_communication_status->verification_attempts = (uint8_t)verification_attempts_raw;
+    uint64_t recovery_successful_mask = (1ULL << 1) - 1ULL;
+    uint64_t recovery_successful_raw = (data >> 7) & recovery_successful_mask;
+    segment_isospi_communication_status->recovery_successful = (uint8_t)recovery_successful_raw;
+}
+
+void receive_fault_status(const can_msg_t *message, fault_status_t *fault_status) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t dcl_enforce_mask = (1ULL << 1) - 1ULL;
+    uint64_t dcl_enforce_raw = (data >> 15) & dcl_enforce_mask;
+    fault_status->dcl_enforce = (bool)dcl_enforce_raw;
+    uint64_t ccl_enforce_mask = (1ULL << 1) - 1ULL;
+    uint64_t ccl_enforce_raw = (data >> 14) & ccl_enforce_mask;
+    fault_status->ccl_enforce = (bool)ccl_enforce_raw;
+    uint64_t low_cell_volt_mask = (1ULL << 1) - 1ULL;
+    uint64_t low_cell_volt_raw = (data >> 13) & low_cell_volt_mask;
+    fault_status->low_cell_volt = (bool)low_cell_volt_raw;
+    uint64_t high_cell_volt_mask = (1ULL << 1) - 1ULL;
+    uint64_t high_cell_volt_raw = (data >> 12) & high_cell_volt_mask;
+    fault_status->high_cell_volt = (bool)high_cell_volt_raw;
+    uint64_t high_charge_volt_mask = (1ULL << 1) - 1ULL;
+    uint64_t high_charge_volt_raw = (data >> 11) & high_charge_volt_mask;
+    fault_status->high_charge_volt = (bool)high_charge_volt_raw;
+    uint64_t pack_hot_mask = (1ULL << 1) - 1ULL;
+    uint64_t pack_hot_raw = (data >> 10) & pack_hot_mask;
+    fault_status->pack_hot = (bool)pack_hot_raw;
+    uint64_t die_temp_max_mask = (1ULL << 1) - 1ULL;
+    uint64_t die_temp_max_raw = (data >> 9) & die_temp_max_mask;
+    fault_status->die_temp_max = (bool)die_temp_max_raw;
+    uint64_t segment_comms_mask = (1ULL << 1) - 1ULL;
+    uint64_t segment_comms_raw = (data >> 8) & segment_comms_mask;
+    fault_status->segment_comms = (bool)segment_comms_raw;
+    uint64_t hv_plate_comms_mask = (1ULL << 1) - 1ULL;
+    uint64_t hv_plate_comms_raw = (data >> 7) & hv_plate_comms_mask;
+    fault_status->hv_plate_comms = (bool)hv_plate_comms_raw;
+}
+
+void receive_segment_average_voltages(const can_msg_t *message, segment_average_voltages_t *segment_average_voltages) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t seg1_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg1_raw = (data >> 52) & seg1_mask;
+    segment_average_voltages->seg1 = (float)(seg1_raw / 1000);
+    uint64_t seg2_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg2_raw = (data >> 40) & seg2_mask;
+    segment_average_voltages->seg2 = (float)(seg2_raw / 1000);
+    uint64_t seg3_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg3_raw = (data >> 28) & seg3_mask;
+    segment_average_voltages->seg3 = (float)(seg3_raw / 1000);
+    uint64_t seg4_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg4_raw = (data >> 16) & seg4_mask;
+    segment_average_voltages->seg4 = (float)(seg4_raw / 1000);
+    uint64_t seg5_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg5_raw = (data >> 4) & seg5_mask;
+    segment_average_voltages->seg5 = (float)(seg5_raw / 1000);
+}
+
+void receive_segment_total_voltages(const can_msg_t *message, segment_total_voltages_t *segment_total_voltages) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t seg1_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg1_raw = (data >> 52) & seg1_mask;
+    segment_total_voltages->seg1 = (float)(seg1_raw / 39);
+    uint64_t seg2_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg2_raw = (data >> 40) & seg2_mask;
+    segment_total_voltages->seg2 = (float)(seg2_raw / 39);
+    uint64_t seg3_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg3_raw = (data >> 28) & seg3_mask;
+    segment_total_voltages->seg3 = (float)(seg3_raw / 39);
+    uint64_t seg4_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg4_raw = (data >> 16) & seg4_mask;
+    segment_total_voltages->seg4 = (float)(seg4_raw / 39);
+    uint64_t seg5_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg5_raw = (data >> 4) & seg5_mask;
+    segment_total_voltages->seg5 = (float)(seg5_raw / 39);
+}
+
+void receive_segment_delta_voltages(const can_msg_t *message, segment_delta_voltages_t *segment_delta_voltages) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t seg1_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg1_raw = (data >> 52) & seg1_mask;
+    segment_delta_voltages->seg1 = (float)(seg1_raw / 1000);
+    uint64_t seg2_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg2_raw = (data >> 40) & seg2_mask;
+    segment_delta_voltages->seg2 = (float)(seg2_raw / 1000);
+    uint64_t seg3_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg3_raw = (data >> 28) & seg3_mask;
+    segment_delta_voltages->seg3 = (float)(seg3_raw / 1000);
+    uint64_t seg4_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg4_raw = (data >> 16) & seg4_mask;
+    segment_delta_voltages->seg4 = (float)(seg4_raw / 1000);
+    uint64_t seg5_mask = (1ULL << 12) - 1ULL;
+    uint64_t seg5_raw = (data >> 4) & seg5_mask;
+    segment_delta_voltages->seg5 = (float)(seg5_raw / 1000);
+}
+
+void receive_bms_debug(const can_msg_t *message, bms_debug_t *bms_debug) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t spare0_mask = (1ULL << 8) - 1ULL;
+    uint64_t spare0_raw = (data >> 56) & spare0_mask;
+    bms_debug->spare0 = (uint8_t)spare0_raw;
+    uint64_t spare1_mask = (1ULL << 8) - 1ULL;
+    uint64_t spare1_raw = (data >> 48) & spare1_mask;
+    bms_debug->spare1 = (uint8_t)spare1_raw;
+    uint64_t spare2_mask = (1ULL << 16) - 1ULL;
+    uint64_t spare2_raw = (data >> 32) & spare2_mask;
+    bms_debug->spare2 = (uint16_t)spare2_raw;
+    uint64_t spare3_mask = (1ULL << 32) - 1ULL;
+    uint64_t spare3_raw = (data >> 0) & spare3_mask;
+    bms_debug->spare3 = (uint32_t)spare3_raw;
+}
+
+void receive_bms_fault_timers(const can_msg_t *message, bms_fault_timers_t *bms_fault_timers) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t start_stop_mask = (1ULL << 8) - 1ULL;
+    uint64_t start_stop_raw = (data >> 56) & start_stop_mask;
+    bms_fault_timers->start_stop = (uint8_t)start_stop_raw;
+    uint64_t code_mask = (1ULL << 8) - 1ULL;
+    uint64_t code_raw = (data >> 48) & code_mask;
+    bms_fault_timers->code = (uint8_t)code_raw;
+    uint64_t value_mask = (1ULL << 32) - 1ULL;
+    uint64_t value_raw = (data >> 16) & value_mask;
+    bms_fault_timers->value = (float)value_raw;
+}
+
+void receive_shepherd_version_tag(const can_msg_t *message, shepherd_version_tag_t *shepherd_version_tag) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t major_mask = (1ULL << 8) - 1ULL;
+    uint64_t major_raw = (data >> 56) & major_mask;
+    shepherd_version_tag->major = (uint8_t)major_raw;
+    uint64_t minor_mask = (1ULL << 8) - 1ULL;
+    uint64_t minor_raw = (data >> 48) & minor_mask;
+    shepherd_version_tag->minor = (uint8_t)minor_raw;
+    uint64_t patch_mask = (1ULL << 8) - 1ULL;
+    uint64_t patch_raw = (data >> 40) & patch_mask;
+    shepherd_version_tag->patch = (uint8_t)patch_raw;
+    uint64_t dirty_mask = (1ULL << 8) - 1ULL;
+    uint64_t dirty_raw = (data >> 32) & dirty_mask;
+    shepherd_version_tag->dirty = (bool)dirty_raw;
+    uint64_t local_commit_mask = (1ULL << 8) - 1ULL;
+    uint64_t local_commit_raw = (data >> 24) & local_commit_mask;
+    shepherd_version_tag->local_commit = (bool)local_commit_raw;
+}
+
+void receive_shepherd_version_hash(const can_msg_t *message, shepherd_version_hash_t *shepherd_version_hash) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t short_hash_mask = (1ULL << 32) - 1ULL;
+    uint64_t short_hash_raw = (data >> 32) & short_hash_mask;
+    shepherd_version_hash->short_hash = (uint32_t)short_hash_raw;
+    uint64_t author_hash_mask = (1ULL << 32) - 1ULL;
+    uint64_t author_hash_raw = (data >> 0) & author_hash_mask;
+    shepherd_version_hash->author_hash = (uint32_t)author_hash_raw;
+}
+
+void receive_overflow_notification_for_percell(const can_msg_t *message, overflow_notification_for_percell_t *overflow_notification_for_percell) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t overflow_can_id_mask = (1ULL << 32) - 1ULL;
+    uint64_t overflow_can_id_raw = (data >> 32) & overflow_can_id_mask;
+    overflow_notification_for_percell->overflow_can_id = (uint32_t)overflow_can_id_raw;
+    uint64_t overflow_cnt_mask = (1ULL << 16) - 1ULL;
+    uint64_t overflow_cnt_raw = (data >> 16) & overflow_cnt_mask;
+    overflow_notification_for_percell->overflow_cnt = (uint16_t)overflow_cnt_raw;
+}
+
+void receive_alpha_cell_data_debug(const can_msg_t *message, alpha_cell_data_debug_t *alpha_cell_data_debug) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t therm_mask = (1ULL << 10) - 1ULL;
+    uint64_t therm_raw = (data >> 54) & therm_mask;
+    alpha_cell_data_debug->therm = (float)(therm_raw / 10);
+    uint64_t voltage_a_mask = (1ULL << 13) - 1ULL;
+    uint64_t voltage_a_raw = (data >> 41) & voltage_a_mask;
+    alpha_cell_data_debug->voltage_a = (float)(voltage_a_raw / 1000);
+    uint64_t voltage_b_mask = (1ULL << 13) - 1ULL;
+    uint64_t voltage_b_raw = (data >> 28) & voltage_b_mask;
+    alpha_cell_data_debug->voltage_b = (float)(voltage_b_raw / 1000);
+    uint64_t chip_id_mask = (1ULL << 4) - 1ULL;
+    uint64_t chip_id_raw = (data >> 24) & chip_id_mask;
+    alpha_cell_data_debug->chip_id = (uint8_t)chip_id_raw;
+    uint64_t cell_a_mask = (1ULL << 4) - 1ULL;
+    uint64_t cell_a_raw = (data >> 20) & cell_a_mask;
+    alpha_cell_data_debug->cell_a = (uint8_t)cell_a_raw;
+    uint64_t cell_b_mask = (1ULL << 4) - 1ULL;
+    uint64_t cell_b_raw = (data >> 16) & cell_b_mask;
+    alpha_cell_data_debug->cell_b = (uint8_t)cell_b_raw;
+    uint64_t discharging_a_mask = (1ULL << 1) - 1ULL;
+    uint64_t discharging_a_raw = (data >> 15) & discharging_a_mask;
+    alpha_cell_data_debug->discharging_a = (bool)discharging_a_raw;
+    uint64_t discharging_b_mask = (1ULL << 1) - 1ULL;
+    uint64_t discharging_b_raw = (data >> 14) & discharging_b_mask;
+    alpha_cell_data_debug->discharging_b = (bool)discharging_b_raw;
+    uint64_t cvs_a_mask = (1ULL << 1) - 1ULL;
+    uint64_t cvs_a_raw = (data >> 13) & cvs_a_mask;
+    alpha_cell_data_debug->cvs_a = (bool)cvs_a_raw;
+    uint64_t cvs_b_mask = (1ULL << 1) - 1ULL;
+    uint64_t cvs_b_raw = (data >> 12) & cvs_b_mask;
+    alpha_cell_data_debug->cvs_b = (bool)cvs_b_raw;
+}
+
+void receive_beta_cell_data_debug(const can_msg_t *message, beta_cell_data_debug_t *beta_cell_data_debug) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t therm_mask = (1ULL << 10) - 1ULL;
+    uint64_t therm_raw = (data >> 54) & therm_mask;
+    beta_cell_data_debug->therm = (float)(therm_raw / 10);
+    uint64_t voltage_a_mask = (1ULL << 13) - 1ULL;
+    uint64_t voltage_a_raw = (data >> 41) & voltage_a_mask;
+    beta_cell_data_debug->voltage_a = (float)(voltage_a_raw / 1000);
+    uint64_t voltage_b_mask = (1ULL << 13) - 1ULL;
+    uint64_t voltage_b_raw = (data >> 28) & voltage_b_mask;
+    beta_cell_data_debug->voltage_b = (float)(voltage_b_raw / 1000);
+    uint64_t chip_id_mask = (1ULL << 4) - 1ULL;
+    uint64_t chip_id_raw = (data >> 24) & chip_id_mask;
+    beta_cell_data_debug->chip_id = (uint8_t)chip_id_raw;
+    uint64_t cell_a_mask = (1ULL << 4) - 1ULL;
+    uint64_t cell_a_raw = (data >> 20) & cell_a_mask;
+    beta_cell_data_debug->cell_a = (uint8_t)cell_a_raw;
+    uint64_t cell_b_mask = (1ULL << 4) - 1ULL;
+    uint64_t cell_b_raw = (data >> 16) & cell_b_mask;
+    beta_cell_data_debug->cell_b = (uint8_t)cell_b_raw;
+    uint64_t discharging_a_mask = (1ULL << 1) - 1ULL;
+    uint64_t discharging_a_raw = (data >> 15) & discharging_a_mask;
+    beta_cell_data_debug->discharging_a = (bool)discharging_a_raw;
+    uint64_t discharging_b_mask = (1ULL << 1) - 1ULL;
+    uint64_t discharging_b_raw = (data >> 14) & discharging_b_mask;
+    beta_cell_data_debug->discharging_b = (bool)discharging_b_raw;
+    uint64_t cvs_a_mask = (1ULL << 1) - 1ULL;
+    uint64_t cvs_a_raw = (data >> 13) & cvs_a_mask;
+    beta_cell_data_debug->cvs_a = (bool)cvs_a_raw;
+    uint64_t cvs_b_mask = (1ULL << 1) - 1ULL;
+    uint64_t cvs_b_raw = (data >> 12) & cvs_b_mask;
+    beta_cell_data_debug->cvs_b = (bool)cvs_b_raw;
+}
+
+void receive_alpha_chip_a_debug(const can_msg_t *message, alpha_chip_a_debug_t *alpha_chip_a_debug) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t chip_id_mask = (1ULL << 4) - 1ULL;
+    uint64_t chip_id_raw = (data >> 60) & chip_id_mask;
+    alpha_chip_a_debug->chip_id = (uint8_t)chip_id_raw;
+    uint64_t die_temp_mask = (1ULL << 13) - 1ULL;
+    uint64_t die_temp_raw = (data >> 47) & die_temp_mask;
+    alpha_chip_a_debug->die_temp = (float)(die_temp_raw / 100);
+    uint64_t vpv_mask = (1ULL << 13) - 1ULL;
+    uint64_t vpv_raw = (data >> 34) & vpv_mask;
+    alpha_chip_a_debug->vpv = (float)(vpv_raw / 100);
+    uint64_t vmv_mask = (1ULL << 13) - 1ULL;
+    uint64_t vmv_raw = (data >> 21) & vmv_mask;
+    alpha_chip_a_debug->vmv = (float)(vmv_raw / 1000);
+    uint64_t va_ov_mask = (1ULL << 1) - 1ULL;
+    uint64_t va_ov_raw = (data >> 20) & va_ov_mask;
+    alpha_chip_a_debug->va_ov = (bool)va_ov_raw;
+    uint64_t va_uv_mask = (1ULL << 1) - 1ULL;
+    uint64_t va_uv_raw = (data >> 19) & va_uv_mask;
+    alpha_chip_a_debug->va_uv = (bool)va_uv_raw;
+    uint64_t vd_ov_mask = (1ULL << 1) - 1ULL;
+    uint64_t vd_ov_raw = (data >> 18) & vd_ov_mask;
+    alpha_chip_a_debug->vd_ov = (bool)vd_ov_raw;
+    uint64_t vd_uv_mask = (1ULL << 1) - 1ULL;
+    uint64_t vd_uv_raw = (data >> 17) & vd_uv_mask;
+    alpha_chip_a_debug->vd_uv = (bool)vd_uv_raw;
+    uint64_t vde_mask = (1ULL << 1) - 1ULL;
+    uint64_t vde_raw = (data >> 16) & vde_mask;
+    alpha_chip_a_debug->vde = (bool)vde_raw;
+    uint64_t vdel_mask = (1ULL << 1) - 1ULL;
+    uint64_t vdel_raw = (data >> 15) & vdel_mask;
+    alpha_chip_a_debug->vdel = (bool)vdel_raw;
+    uint64_t spiflt_mask = (1ULL << 1) - 1ULL;
+    uint64_t spiflt_raw = (data >> 14) & spiflt_mask;
+    alpha_chip_a_debug->spiflt = (bool)spiflt_raw;
+    uint64_t sleep_mask = (1ULL << 1) - 1ULL;
+    uint64_t sleep_raw = (data >> 13) & sleep_mask;
+    alpha_chip_a_debug->sleep = (bool)sleep_raw;
+    uint64_t thsd_mask = (1ULL << 1) - 1ULL;
+    uint64_t thsd_raw = (data >> 12) & thsd_mask;
+    alpha_chip_a_debug->thsd = (bool)thsd_raw;
+    uint64_t tmodchk_mask = (1ULL << 1) - 1ULL;
+    uint64_t tmodchk_raw = (data >> 11) & tmodchk_mask;
+    alpha_chip_a_debug->tmodchk = (bool)tmodchk_raw;
+    uint64_t oscchk_mask = (1ULL << 1) - 1ULL;
+    uint64_t oscchk_raw = (data >> 10) & oscchk_mask;
+    alpha_chip_a_debug->oscchk = (bool)oscchk_raw;
+}
+
+void receive_alpha_chip_b_debug(const can_msg_t *message, alpha_chip_b_debug_t *alpha_chip_b_debug) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t vres_mask = (1ULL << 13) - 1ULL;
+    uint64_t vres_raw = (data >> 51) & vres_mask;
+    alpha_chip_b_debug->vres = (float)(vres_raw / 1000);
+    uint64_t chip_id_mask = (1ULL << 4) - 1ULL;
+    uint64_t chip_id_raw = (data >> 47) & chip_id_mask;
+    alpha_chip_b_debug->chip_id = (uint8_t)chip_id_raw;
+    uint64_t vref2_mask = (1ULL << 13) - 1ULL;
+    uint64_t vref2_raw = (data >> 34) & vref2_mask;
+    alpha_chip_b_debug->vref2 = (float)(vref2_raw / 1000);
+    uint64_t v_analog_mask = (1ULL << 13) - 1ULL;
+    uint64_t v_analog_raw = (data >> 21) & v_analog_mask;
+    alpha_chip_b_debug->v_analog = (float)(v_analog_raw / 1000);
+    uint64_t v_digital_mask = (1ULL << 13) - 1ULL;
+    uint64_t v_digital_raw = (data >> 8) & v_digital_mask;
+    alpha_chip_b_debug->v_digital = (float)(v_digital_raw / 1000);
+    uint64_t otp1_med_mask = (1ULL << 1) - 1ULL;
+    uint64_t otp1_med_raw = (data >> 7) & otp1_med_mask;
+    alpha_chip_b_debug->otp1_med = (bool)otp1_med_raw;
+    uint64_t opt2_med_mask = (1ULL << 1) - 1ULL;
+    uint64_t opt2_med_raw = (data >> 6) & opt2_med_mask;
+    alpha_chip_b_debug->opt2_med = (bool)opt2_med_raw;
+}
+
+void receive_beta_chip_a_debug(const can_msg_t *message, beta_chip_a_debug_t *beta_chip_a_debug) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t chip_id_mask = (1ULL << 4) - 1ULL;
+    uint64_t chip_id_raw = (data >> 60) & chip_id_mask;
+    beta_chip_a_debug->chip_id = (uint8_t)chip_id_raw;
+    uint64_t die_temp_mask = (1ULL << 13) - 1ULL;
+    uint64_t die_temp_raw = (data >> 47) & die_temp_mask;
+    beta_chip_a_debug->die_temp = (float)(die_temp_raw / 100);
+    uint64_t vpv_mask = (1ULL << 13) - 1ULL;
+    uint64_t vpv_raw = (data >> 34) & vpv_mask;
+    beta_chip_a_debug->vpv = (float)(vpv_raw / 100);
+    uint64_t vmv_mask = (1ULL << 13) - 1ULL;
+    uint64_t vmv_raw = (data >> 21) & vmv_mask;
+    beta_chip_a_debug->vmv = (float)(vmv_raw / 1000);
+    uint64_t va_ov_mask = (1ULL << 1) - 1ULL;
+    uint64_t va_ov_raw = (data >> 20) & va_ov_mask;
+    beta_chip_a_debug->va_ov = (bool)va_ov_raw;
+    uint64_t va_uv_mask = (1ULL << 1) - 1ULL;
+    uint64_t va_uv_raw = (data >> 19) & va_uv_mask;
+    beta_chip_a_debug->va_uv = (bool)va_uv_raw;
+    uint64_t vd_ov_mask = (1ULL << 1) - 1ULL;
+    uint64_t vd_ov_raw = (data >> 18) & vd_ov_mask;
+    beta_chip_a_debug->vd_ov = (bool)vd_ov_raw;
+    uint64_t vd_uv_mask = (1ULL << 1) - 1ULL;
+    uint64_t vd_uv_raw = (data >> 17) & vd_uv_mask;
+    beta_chip_a_debug->vd_uv = (bool)vd_uv_raw;
+    uint64_t vde_mask = (1ULL << 1) - 1ULL;
+    uint64_t vde_raw = (data >> 16) & vde_mask;
+    beta_chip_a_debug->vde = (bool)vde_raw;
+    uint64_t vdel_mask = (1ULL << 1) - 1ULL;
+    uint64_t vdel_raw = (data >> 15) & vdel_mask;
+    beta_chip_a_debug->vdel = (bool)vdel_raw;
+    uint64_t spiflt_mask = (1ULL << 1) - 1ULL;
+    uint64_t spiflt_raw = (data >> 14) & spiflt_mask;
+    beta_chip_a_debug->spiflt = (bool)spiflt_raw;
+    uint64_t sleep_mask = (1ULL << 1) - 1ULL;
+    uint64_t sleep_raw = (data >> 13) & sleep_mask;
+    beta_chip_a_debug->sleep = (bool)sleep_raw;
+    uint64_t thsd_mask = (1ULL << 1) - 1ULL;
+    uint64_t thsd_raw = (data >> 12) & thsd_mask;
+    beta_chip_a_debug->thsd = (bool)thsd_raw;
+    uint64_t tmodchk_mask = (1ULL << 1) - 1ULL;
+    uint64_t tmodchk_raw = (data >> 11) & tmodchk_mask;
+    beta_chip_a_debug->tmodchk = (bool)tmodchk_raw;
+    uint64_t oscchk_mask = (1ULL << 1) - 1ULL;
+    uint64_t oscchk_raw = (data >> 10) & oscchk_mask;
+    beta_chip_a_debug->oscchk = (bool)oscchk_raw;
+}
+
+void receive_beta_chip_b_debug(const can_msg_t *message, beta_chip_b_debug_t *beta_chip_b_debug) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t vres_mask = (1ULL << 13) - 1ULL;
+    uint64_t vres_raw = (data >> 51) & vres_mask;
+    beta_chip_b_debug->vres = (float)(vres_raw / 1000);
+    uint64_t chip_id_mask = (1ULL << 4) - 1ULL;
+    uint64_t chip_id_raw = (data >> 47) & chip_id_mask;
+    beta_chip_b_debug->chip_id = (uint8_t)chip_id_raw;
+    uint64_t vref2_mask = (1ULL << 13) - 1ULL;
+    uint64_t vref2_raw = (data >> 34) & vref2_mask;
+    beta_chip_b_debug->vref2 = (float)(vref2_raw / 1000);
+    uint64_t v_analog_mask = (1ULL << 13) - 1ULL;
+    uint64_t v_analog_raw = (data >> 21) & v_analog_mask;
+    beta_chip_b_debug->v_analog = (float)(v_analog_raw / 1000);
+    uint64_t v_digital_mask = (1ULL << 13) - 1ULL;
+    uint64_t v_digital_raw = (data >> 8) & v_digital_mask;
+    beta_chip_b_debug->v_digital = (float)(v_digital_raw / 1000);
+    uint64_t otp1_med_mask = (1ULL << 1) - 1ULL;
+    uint64_t otp1_med_raw = (data >> 7) & otp1_med_mask;
+    beta_chip_b_debug->otp1_med = (bool)otp1_med_raw;
+    uint64_t opt2_med_mask = (1ULL << 1) - 1ULL;
+    uint64_t opt2_med_raw = (data >> 6) & opt2_med_mask;
+    beta_chip_b_debug->opt2_med = (bool)opt2_med_raw;
+}
+
+void receive_fan_duty_cycle_percentage(const can_msg_t *message, fan_duty_cycle_percentage_t *fan_duty_cycle_percentage) {
+    
+    uint8_t data = message->data[0];
+    uint64_t fan_duty_cycle_mask = (1ULL << 8) - 1ULL;
+    uint64_t fan_duty_cycle_raw = (data >> 0) & fan_duty_cycle_mask;
+    fan_duty_cycle_percentage->fan_duty_cycle = (uint8_t)fan_duty_cycle_raw;
+}
+
+void receive_onboard_therm_temperatures(const can_msg_t *message, onboard_therm_temperatures_t *onboard_therm_temperatures) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t chip_id_mask = (1ULL << 8) - 1ULL;
+    uint64_t chip_id_raw = (data >> 56) & chip_id_mask;
+    onboard_therm_temperatures->chip_id = (uint8_t)chip_id_raw;
+    uint64_t therm_temp_1_mask = (1ULL << 16) - 1ULL;
+    uint64_t therm_temp_1_bits = (data >> 40) & therm_temp_1_mask;
+    int64_t therm_temp_1_raw = (therm_temp_1_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(therm_temp_1_bits | ~therm_temp_1_mask)
+        : (int64_t)therm_temp_1_bits;
+    onboard_therm_temperatures->therm_temp_1 = (float)(therm_temp_1_raw / 100);
+    uint64_t therm_temp_2_mask = (1ULL << 16) - 1ULL;
+    uint64_t therm_temp_2_bits = (data >> 24) & therm_temp_2_mask;
+    int64_t therm_temp_2_raw = (therm_temp_2_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(therm_temp_2_bits | ~therm_temp_2_mask)
+        : (int64_t)therm_temp_2_bits;
+    onboard_therm_temperatures->therm_temp_2 = (float)(therm_temp_2_raw / 100);
+    uint64_t therm_temp_3_mask = (1ULL << 16) - 1ULL;
+    uint64_t therm_temp_3_bits = (data >> 8) & therm_temp_3_mask;
+    int64_t therm_temp_3_raw = (therm_temp_3_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(therm_temp_3_bits | ~therm_temp_3_mask)
+        : (int64_t)therm_temp_3_bits;
+    onboard_therm_temperatures->therm_temp_3 = (float)(therm_temp_3_raw / 100);
+}
+
+void receive_precharge_status(const can_msg_t *message, precharge_status_t *precharge_status) {
+    
+    uint8_t data = message->data[0];
+    uint64_t precharge_status_mask = (1ULL << 1) - 1ULL;
+    uint64_t precharge_status_raw = (data >> 7) & precharge_status_mask;
+    precharge_status->precharge_status = (bool)precharge_status_raw;
+}
+
+void receive_hv_plate_data(const can_msg_t *message, hv_plate_data_t *hv_plate_data) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t batt_voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t batt_voltage_bits = (data >> 48) & batt_voltage_mask;
+    int64_t batt_voltage_raw = (batt_voltage_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(batt_voltage_bits | ~batt_voltage_mask)
+        : (int64_t)batt_voltage_bits;
+    hv_plate_data->batt_voltage = (float)(batt_voltage_raw / 100);
+    uint64_t ts_voltage_mask = (1ULL << 16) - 1ULL;
+    uint64_t ts_voltage_bits = (data >> 32) & ts_voltage_mask;
+    int64_t ts_voltage_raw = (ts_voltage_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(ts_voltage_bits | ~ts_voltage_mask)
+        : (int64_t)ts_voltage_bits;
+    hv_plate_data->ts_voltage = (float)(ts_voltage_raw / 100);
+    uint64_t shunt_temp_mask = (1ULL << 16) - 1ULL;
+    uint64_t shunt_temp_bits = (data >> 16) & shunt_temp_mask;
+    int64_t shunt_temp_raw = (shunt_temp_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(shunt_temp_bits | ~shunt_temp_mask)
+        : (int64_t)shunt_temp_bits;
+    hv_plate_data->shunt_temp = (float)(shunt_temp_raw / 100);
+    uint64_t pack_current_mask = (1ULL << 16) - 1ULL;
+    uint64_t pack_current_bits = (data >> 0) & pack_current_mask;
+    int64_t pack_current_raw = (pack_current_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(pack_current_bits | ~pack_current_mask)
+        : (int64_t)pack_current_bits;
+    hv_plate_data->pack_current = (float)(pack_current_raw / 100);
+}
+
+void receive_segment_pec_errors(const can_msg_t *message, segment_pec_errors_t *segment_pec_errors) {
+    
+    uint32_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 4);
+    uint32_t data = __builtin_bswap32(data_bigendian);
+    uint64_t chip_id_mask = (1ULL << 8) - 1ULL;
+    uint64_t chip_id_raw = (data >> 24) & chip_id_mask;
+    segment_pec_errors->chip_id = (uint8_t)chip_id_raw;
+    uint64_t pec_errors_mask = (1ULL << 16) - 1ULL;
+    uint64_t pec_errors_raw = (data >> 8) & pec_errors_mask;
+    segment_pec_errors->pec_errors = (uint16_t)pec_errors_raw;
+}
+
+void receive_hv_plate_pec_errors(const can_msg_t *message, hv_plate_pec_errors_t *hv_plate_pec_errors) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t pec_errors_mask = (1ULL << 16) - 1ULL;
+    uint64_t pec_errors_raw = (data >> 0) & pec_errors_mask;
+    hv_plate_pec_errors->pec_errors = (uint16_t)pec_errors_raw;
+}
+
+void receive_hv_plate_diagnostics(const can_msg_t *message, hv_plate_diagnostics_t *hv_plate_diagnostics) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t flags_mask = (1ULL << 12) - 1ULL;
+    uint64_t flags_raw = (data >> 52) & flags_mask;
+    hv_plate_diagnostics->flags = (uint16_t)flags_raw;
+    uint64_t vreg_mask = (1ULL << 12) - 1ULL;
+    uint64_t vreg_raw = (data >> 40) & vreg_mask;
+    hv_plate_diagnostics->vreg = (float)(vreg_raw / 100);
+    uint64_t tmp1_mask = (1ULL << 12) - 1ULL;
+    uint64_t tmp1_raw = (data >> 28) & tmp1_mask;
+    hv_plate_diagnostics->tmp1 = (float)(tmp1_raw / 100);
+    uint64_t vref1p25_mask = (1ULL << 12) - 1ULL;
+    uint64_t vref1p25_raw = (data >> 16) & vref1p25_mask;
+    hv_plate_diagnostics->vref1p25 = (float)(vref1p25_raw / 100);
+    uint64_t osccnt_mask = (1ULL << 16) - 1ULL;
+    uint64_t osccnt_raw = (data >> 0) & osccnt_mask;
+    hv_plate_diagnostics->osccnt = (uint16_t)osccnt_raw;
+}
+
+void receive_hv_plate_diagnostics_second(const can_msg_t *message, hv_plate_diagnostics_second_t *hv_plate_diagnostics_second) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t epad_mask = (1ULL << 12) - 1ULL;
+    uint64_t epad_raw = (data >> 52) & epad_mask;
+    hv_plate_diagnostics_second->epad = (float)(epad_raw / 100);
+    uint64_t vdig_mask = (1ULL << 12) - 1ULL;
+    uint64_t vdig_raw = (data >> 40) & vdig_mask;
+    hv_plate_diagnostics_second->vdig = (float)(vdig_raw / 100);
+    uint64_t vdd_mask = (1ULL << 12) - 1ULL;
+    uint64_t vdd_raw = (data >> 28) & vdd_mask;
+    hv_plate_diagnostics_second->vdd = (float)(vdd_raw / 100);
+    uint64_t tmp2_mask = (1ULL << 12) - 1ULL;
+    uint64_t tmp2_raw = (data >> 16) & tmp2_mask;
+    hv_plate_diagnostics_second->tmp2 = (float)(tmp2_raw / 100);
+    uint64_t vdiv_mask = (1ULL << 12) - 1ULL;
+    uint64_t vdiv_raw = (data >> 4) & vdiv_mask;
+    hv_plate_diagnostics_second->vdiv = (float)(vdiv_raw / 100);
+}
+
+void receive_bms_onboard_temperature(const can_msg_t *message, bms_onboard_temperature_t *bms_onboard_temperature) {
+    
+    uint16_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 2);
+    uint16_t data = __builtin_bswap16(data_bigendian);
+    uint64_t internal_temp_mask = (1ULL << 16) - 1ULL;
+    uint64_t internal_temp_raw = (data >> 0) & internal_temp_mask;
+    bms_onboard_temperature->internal_temp = (float)(internal_temp_raw / 100);
+}
+
+void receive_bms_imu_accelerometer(const can_msg_t *message, bms_imu_accelerometer_t *bms_imu_accelerometer) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t imu_accelerometer_x_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_accelerometer_x_bits = (data >> 48) & imu_accelerometer_x_mask;
+    int64_t imu_accelerometer_x_raw = (imu_accelerometer_x_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_accelerometer_x_bits | ~imu_accelerometer_x_mask)
+        : (int64_t)imu_accelerometer_x_bits;
+    bms_imu_accelerometer->imu_accelerometer_x = (float)(imu_accelerometer_x_raw / 4);
+    uint64_t imu_accelerometer_y_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_accelerometer_y_bits = (data >> 32) & imu_accelerometer_y_mask;
+    int64_t imu_accelerometer_y_raw = (imu_accelerometer_y_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_accelerometer_y_bits | ~imu_accelerometer_y_mask)
+        : (int64_t)imu_accelerometer_y_bits;
+    bms_imu_accelerometer->imu_accelerometer_y = (float)(imu_accelerometer_y_raw / 4);
+    uint64_t imu_accelerometer_z_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_accelerometer_z_bits = (data >> 16) & imu_accelerometer_z_mask;
+    int64_t imu_accelerometer_z_raw = (imu_accelerometer_z_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_accelerometer_z_bits | ~imu_accelerometer_z_mask)
+        : (int64_t)imu_accelerometer_z_bits;
+    bms_imu_accelerometer->imu_accelerometer_z = (float)(imu_accelerometer_z_raw / 4);
+}
+
+void receive_bms_imu_gyro(const can_msg_t *message, bms_imu_gyro_t *bms_imu_gyro) {
+    
+    uint64_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 8);
+    uint64_t data = __builtin_bswap64(data_bigendian);
+    uint64_t imu_gyro_x_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_gyro_x_bits = (data >> 48) & imu_gyro_x_mask;
+    int64_t imu_gyro_x_raw = (imu_gyro_x_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_gyro_x_bits | ~imu_gyro_x_mask)
+        : (int64_t)imu_gyro_x_bits;
+    bms_imu_gyro->imu_gyro_x = (float)(imu_gyro_x_raw / 100);
+    uint64_t imu_gyro_y_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_gyro_y_bits = (data >> 32) & imu_gyro_y_mask;
+    int64_t imu_gyro_y_raw = (imu_gyro_y_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_gyro_y_bits | ~imu_gyro_y_mask)
+        : (int64_t)imu_gyro_y_bits;
+    bms_imu_gyro->imu_gyro_y = (float)(imu_gyro_y_raw / 100);
+    uint64_t imu_gyro_z_mask = (1ULL << 16) - 1ULL;
+    uint64_t imu_gyro_z_bits = (data >> 16) & imu_gyro_z_mask;
+    int64_t imu_gyro_z_raw = (imu_gyro_z_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(imu_gyro_z_bits | ~imu_gyro_z_mask)
+        : (int64_t)imu_gyro_z_bits;
+    bms_imu_gyro->imu_gyro_z = (float)(imu_gyro_z_raw / 100);
+}
+
+void receive_pack_soc_status(const can_msg_t *message, pack_soc_status_t *pack_soc_status) {
+    
+    uint32_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 4);
+    uint32_t data = __builtin_bswap32(data_bigendian);
+    uint64_t Pack_SoC_mask = (1ULL << 16) - 1ULL;
+    uint64_t Pack_SoC_raw = (data >> 16) & Pack_SoC_mask;
+    pack_soc_status->Pack_SoC = (float)(Pack_SoC_raw / 1000);
+    uint64_t Pack_SoC_Drift_mask = (1ULL << 16) - 1ULL;
+    uint64_t Pack_SoC_Drift_bits = (data >> 0) & Pack_SoC_Drift_mask;
+    int64_t Pack_SoC_Drift_raw = (Pack_SoC_Drift_bits & (1ULL << (16 - 1)))
+        ? (int64_t)(Pack_SoC_Drift_bits | ~Pack_SoC_Drift_mask)
+        : (int64_t)Pack_SoC_Drift_bits;
+    pack_soc_status->Pack_SoC_Drift = (float)(Pack_SoC_Drift_raw / 1000);
+}
+
+void receive_shutdown_as_read_by_bms(const can_msg_t *message, shutdown_as_read_by_bms_t *shutdown_as_read_by_bms) {
+    
+    uint8_t data = message->data[0];
+    uint64_t shutdown_mask = (1ULL << 8) - 1ULL;
+    uint64_t shutdown_raw = (data >> 0) & shutdown_mask;
+    shutdown_as_read_by_bms->shutdown = (bool)shutdown_raw;
+}
+
+void receive_hv_plate_isospi_communication_status(const can_msg_t *message, hv_plate_isospi_communication_status_t *hv_plate_isospi_communication_status) {
+    
+    uint32_t data_bigendian;
+    memcpy(&data_bigendian, message->data, 4);
+    uint32_t data = __builtin_bswap32(data_bigendian);
+    uint64_t state_mask = (1ULL << 8) - 1ULL;
+    uint64_t state_raw = (data >> 24) & state_mask;
+    hv_plate_isospi_communication_status->state = (uint8_t)state_raw;
+    uint64_t verification_attempts_mask = (1ULL << 8) - 1ULL;
+    uint64_t verification_attempts_raw = (data >> 16) & verification_attempts_mask;
+    hv_plate_isospi_communication_status->verification_attempts = (uint8_t)verification_attempts_raw;
+    uint64_t recovery_successful_mask = (1ULL << 1) - 1ULL;
+    uint64_t recovery_successful_raw = (data >> 15) & recovery_successful_mask;
+    hv_plate_isospi_communication_status->recovery_successful = (uint8_t)recovery_successful_raw;
+}
+
+void receive_bms_critically_faulted(const can_msg_t *message, bms_critically_faulted_t *bms_critically_faulted) {
+    
+    uint8_t data = message->data[0];
+    uint64_t critically_faulted_mask = (1ULL << 1) - 1ULL;
+    uint64_t critically_faulted_raw = (data >> 7) & critically_faulted_mask;
+    bms_critically_faulted->critically_faulted = (bool)critically_faulted_raw;
+}
+
diff --git a/Core/Src/can_messages_tx.c b/Core/Src/can_messages_tx.c
index 62d21ac..03bae99 100644
--- a/Core/Src/can_messages_tx.c
+++ b/Core/Src/can_messages_tx.c
@@ -21,10 +21,9 @@ uint8_t send_lightning_board_imu_acceleration_data
 {
     can_msg_t msg;
     msg.id = 0xAAA;
-    msg.id_is_extended = true;msg.len = 6;
-
-    
+    msg.id_is_extended = true;
             uint64_t data = 0;
+            msg.len = 8;
                         int32_t accel_x_i = (int32_t)(accel_x*1000);
                         if(accel_x_i > 32767) {accel_x_i = 32767;
                         } else if(accel_x_i < -32768) {accel_x_i = -32768;
@@ -45,7 +44,6 @@ uint8_t send_lightning_board_imu_acceleration_data
             
             uint64_t data_bigendian = __builtin_bswap64(data);
             memcpy(msg.data, &data_bigendian, 8);
-        
 
     return queue_send(&can_outgoing, &msg, TX_NO_WAIT);
 }
@@ -55,10 +53,9 @@ uint8_t send_lightning_board_imu_gyro_data
 {
     can_msg_t msg;
     msg.id = 0xAAB;
-    msg.id_is_extended = true;msg.len = 6;
-
-    
+    msg.id_is_extended = true;
             uint64_t data = 0;
+            msg.len = 8;
                         int32_t gyro_x_i = (int32_t)(gyro_x*1000);
                         if(gyro_x_i > 32767) {gyro_x_i = 32767;
                         } else if(gyro_x_i < -32768) {gyro_x_i = -32768;
@@ -79,7 +76,6 @@ uint8_t send_lightning_board_imu_gyro_data
             
             uint64_t data_bigendian = __builtin_bswap64(data);
             memcpy(msg.data, &data_bigendian, 8);
-        
 
     return queue_send(&can_outgoing, &msg, TX_NO_WAIT);
 }
@@ -89,10 +85,9 @@ uint8_t send_lightning_board_lightning_sensor_information
 {
     can_msg_t msg;
     msg.id = 0xAAC;
-    msg.id_is_extended = true;msg.len = 6;
-
-    
+    msg.id_is_extended = true;
             uint64_t data = 0;
+            msg.len = 8;
                         uint32_t interrupt_i = (uint32_t)(interrupt);
                         if(interrupt_i > 255ULL) {interrupt_i = 255;
                         }
@@ -110,7 +105,6 @@ uint8_t send_lightning_board_lightning_sensor_information
             
             uint64_t data_bigendian = __builtin_bswap64(data);
             memcpy(msg.data, &data_bigendian, 8);
-        
 
     return queue_send(&can_outgoing, &msg, TX_NO_WAIT);
 }
@@ -120,10 +114,9 @@ uint8_t send_lightning_board_magnometer_sensor_information
 {
     can_msg_t msg;
     msg.id = 0xAAD;
-    msg.id_is_extended = true;msg.len = 6;
-
-    
+    msg.id_is_extended = true;
             uint64_t data = 0;
+            msg.len = 8;
                         int32_t mag_x_i = (int32_t)(mag_x*1000);
                         if(mag_x_i > 32767) {mag_x_i = 32767;
                         } else if(mag_x_i < -32768) {mag_x_i = -32768;
@@ -144,7 +137,6 @@ uint8_t send_lightning_board_magnometer_sensor_information
             
             uint64_t data_bigendian = __builtin_bswap64(data);
             memcpy(msg.data, &data_bigendian, 8);
-        
 
     return queue_send(&can_outgoing, &msg, TX_NO_WAIT);
 }
diff --git a/Core/Src/main.c b/Core/Src/main.c
index effe083..b21b4b0 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -99,7 +99,7 @@ int _write(int file, char *ptr, int len)
 /* Callback for any FIFO0 interrupt stuff */
 void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs)
 {
-  //PRINTLN_INFO("HAL_FDCAN callback triggered");
+  PRINTLN_INFO("HAL_FDCAN callback triggered");
 
 	/* If a message has just been recieved... */
 	if (RxFifo0ITs & FDCAN_IT_RX_FIFO0_NEW_MESSAGE)
@@ -344,8 +344,8 @@ static void MX_FDCAN2_Init(void)
   hfdcan2.Init.DataSyncJumpWidth = 1;
   hfdcan2.Init.DataTimeSeg1 = 1;
   hfdcan2.Init.DataTimeSeg2 = 1;
-  hfdcan2.Init.StdFiltersNbr = 1;
-  hfdcan2.Init.ExtFiltersNbr = 0;
+  hfdcan2.Init.StdFiltersNbr = 28;
+  hfdcan2.Init.ExtFiltersNbr = 8;
   hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
   if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK)
   {
@@ -538,18 +538,18 @@ static void MX_SPI1_Init(void)
   hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
   hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
   hspi1.Init.NSS = SPI_NSS_SOFT;
-  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
+  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
   hspi1.Init.CRCPolynomial = 0x7;
-  hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
+  hspi1.Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
   hspi1.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
   hspi1.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
   hspi1.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
   hspi1.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
   hspi1.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
-  hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
+  hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;
   hspi1.Init.IOSwap = SPI_IO_SWAP_DISABLE;
   hspi1.Init.ReadyMasterManagement = SPI_RDY_MASTER_MANAGEMENT_INTERNALLY;
   hspi1.Init.ReadyPolarity = SPI_RDY_POLARITY_HIGH;
@@ -591,13 +591,13 @@ static void MX_SPI2_Init(void)
   hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
   hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
   hspi2.Init.CRCPolynomial = 0x7;
-  hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
+  hspi2.Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
   hspi2.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
   hspi2.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
   hspi2.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
   hspi2.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
   hspi2.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
-  hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
+  hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;
   hspi2.Init.IOSwap = SPI_IO_SWAP_DISABLE;
   hspi2.Init.ReadyMasterManagement = SPI_RDY_MASTER_MANAGEMENT_INTERNALLY;
   hspi2.Init.ReadyPolarity = SPI_RDY_POLARITY_HIGH;
@@ -639,13 +639,13 @@ static void MX_SPI3_Init(void)
   hspi3.Init.TIMode = SPI_TIMODE_DISABLE;
   hspi3.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
   hspi3.Init.CRCPolynomial = 0x7;
-  hspi3.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
+  hspi3.Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
   hspi3.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
   hspi3.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
   hspi3.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
   hspi3.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
   hspi3.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
-  hspi3.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
+  hspi3.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;
   hspi3.Init.IOSwap = SPI_IO_SWAP_DISABLE;
   hspi3.Init.ReadyMasterManagement = SPI_RDY_MASTER_MANAGEMENT_INTERNALLY;
   hspi3.Init.ReadyPolarity = SPI_RDY_POLARITY_HIGH;
diff --git a/Core/Src/stm32h5xx_hal_msp.c b/Core/Src/stm32h5xx_hal_msp.c
index e760760..ddd8605 100644
--- a/Core/Src/stm32h5xx_hal_msp.c
+++ b/Core/Src/stm32h5xx_hal_msp.c
@@ -162,6 +162,8 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* hfdcan)
     /* FDCAN2 interrupt Init */
     HAL_NVIC_SetPriority(FDCAN2_IT0_IRQn, 0, 0);
     HAL_NVIC_EnableIRQ(FDCAN2_IT0_IRQn);
+    HAL_NVIC_SetPriority(FDCAN2_IT1_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(FDCAN2_IT1_IRQn);
     /* USER CODE BEGIN FDCAN2_MspInit 1 */
 
     /* USER CODE END FDCAN2_MspInit 1 */
@@ -194,6 +196,7 @@ void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* hfdcan)
 
     /* FDCAN2 interrupt DeInit */
     HAL_NVIC_DisableIRQ(FDCAN2_IT0_IRQn);
+    HAL_NVIC_DisableIRQ(FDCAN2_IT1_IRQn);
     /* USER CODE BEGIN FDCAN2_MspDeInit 1 */
 
     /* USER CODE END FDCAN2_MspDeInit 1 */
diff --git a/Core/Src/stm32h5xx_it.c b/Core/Src/stm32h5xx_it.c
index f6a83a5..045761c 100644
--- a/Core/Src/stm32h5xx_it.c
+++ b/Core/Src/stm32h5xx_it.c
@@ -188,6 +188,20 @@ void FDCAN2_IT0_IRQHandler(void)
   /* USER CODE END FDCAN2_IT0_IRQn 1 */
 }
 
+/**
+  * @brief This function handles FDCAN2 interrupt 1.
+  */
+void FDCAN2_IT1_IRQHandler(void)
+{
+  /* USER CODE BEGIN FDCAN2_IT1_IRQn 0 */
+
+  /* USER CODE END FDCAN2_IT1_IRQn 0 */
+  HAL_FDCAN_IRQHandler(&hfdcan2);
+  /* USER CODE BEGIN FDCAN2_IT1_IRQn 1 */
+
+  /* USER CODE END FDCAN2_IT1_IRQn 1 */
+}
+
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */
diff --git a/Core/Src/u_can.c b/Core/Src/u_can.c
index 2b9126f..160af23 100644
--- a/Core/Src/u_can.c
+++ b/Core/Src/u_can.c
@@ -16,13 +16,21 @@ uint8_t can2_init(FDCAN_HandleTypeDef *hcan) {
     }
 
     /* Add filters for standard IDs */
-    uint16_t standard_ids[] = { CERBERUS_MSG_ID, 0x0 };
+    uint16_t standard_ids[] = { IMD_GENERAL_MSG_ID, BMS_LIGHTNING_OKAY_MSG_ID };
     status = can_add_filter_standard(&can2, standard_ids);
     if(status != HAL_OK) {
         PRINTLN_ERROR("Failed to add standard filter to can2 (Status: %d/%s, ID1: %d, ID2: %d).", status, hal_status_toString(status), standard_ids[0], standard_ids[1]);
         return U_ERROR;
     }
 
+    /* Add filters for extended IDs */
+    uint32_t extended_ids[] = { BMS_LIGHTNING_OKAY_MSG_ID, CERBERUS_MSG_ID };
+    status = can_add_filter_extended(&can2, extended_ids);
+    if (status != HAL_OK) {
+        PRINTLN_ERROR("Failed to add extended filter to can2 (Status: %d/%s, ID1: %lu, ID2: %lu).", status, hal_status_toString(status), extended_ids[0], extended_ids[1]);
+        return U_ERROR;
+    }
+
     PRINTLN_INFO("Ran can2_init().");  
 
     return U_SUCCESS;
diff --git a/Core/Src/u_inbox.c b/Core/Src/u_inbox.c
index 2397c44..c48ed7a 100644
--- a/Core/Src/u_inbox.c
+++ b/Core/Src/u_inbox.c
@@ -3,14 +3,17 @@
 #include "u_statemachine.h"
 
 void inbox_can(can_msg_t *message) {
-    printf("DATA: %d", message->data);
+    PRINTLN_INFO("can - incoming can message");
     switch(message->id) {
-        case CERBERUS_MSG_ID:
-            Lightning_Board_Light_Status state = message->data[0];
-            set_statemachine(state);
+        case IMD_GENERAL_MSG_ID:
+            statemachine_handleIMDMessage(message);
+            break;
+        case BMS_LIGHTNING_OKAY_MSG_ID:
+            PRINTLN_INFO("can - receieved the bms lightning message");
+            statemachine_handleBMSMessage(message);
             break;
         default:
-            PRINTLN_WARNING("Unknown Inbox Message. ID: %lu", message->id);
+            PRINTLN_WARNING("Unknown Inbox Message. ID: 0x%X", message->id);
             break;
     }
 }
\ No newline at end of file
diff --git a/Core/Src/u_lights.c b/Core/Src/u_lights.c
new file mode 100644
index 0000000..7e88a06
--- /dev/null
+++ b/Core/Src/u_lights.c
@@ -0,0 +1,24 @@
+#include "u_lights.h"
+#include "main.h"
+#include "u_tx_debug.h"
+
+/* Turns on the red light, and off the green light. */
+void lights_setRed(void) {
+    //PRINTLN_INFO("Lightning set to red light.");
+    HAL_GPIO_WritePin(GREEN_GPIO_Port, GREEN_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(RED_GPIO_Port, RED_Pin, GPIO_PIN_SET);
+}
+
+/* Turns on the green light, and off the red light. */
+void lights_setGreen(void) {
+    //PRINTLN_INFO("Lightning set to green light.");
+    HAL_GPIO_WritePin(RED_GPIO_Port, RED_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(GREEN_GPIO_Port, GREEN_Pin, GPIO_PIN_SET);
+}
+
+/* Sets all lights off. */
+void lights_setOff(void) {
+    //PRINTLN_INFO("Lightning set to lights off.");
+    HAL_GPIO_WritePin(GREEN_GPIO_Port, GREEN_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(RED_GPIO_Port, RED_Pin, GPIO_PIN_RESET);
+}
\ No newline at end of file
diff --git a/Core/Src/u_mutexes.c b/Core/Src/u_mutexes.c
index f0af86b..0d5b33a 100644
--- a/Core/Src/u_mutexes.c
+++ b/Core/Src/u_mutexes.c
@@ -2,19 +2,9 @@
 #include "u_mutexes.h"
 #include "u_tx_debug.h"
 
-/* State Machine Mutex */
-/* Used to protect multiple threads attempting to write to the fault flags variable at once. */
-mutex_t state_machine_mutex = {
-    .name = "Faults Mutex",        /* Name of the mutex. */
-    .priority_inherit = TX_INHERIT /* Priority inheritance setting. */
-};
+// No mutexes as of right now.
 
 uint8_t mutexes_init() {
-    if (create_mutex(&state_machine_mutex) != U_SUCCESS) {
-        PRINTLN_ERROR("mutexes_init() failed.");
-        return U_ERROR;
-    }
-
     PRINTLN_INFO("Ran mutexes_init().");
     return U_SUCCESS;
 }
diff --git a/Core/Src/u_statemachine.c b/Core/Src/u_statemachine.c
index 260b7bb..e08f1a7 100644
--- a/Core/Src/u_statemachine.c
+++ b/Core/Src/u_statemachine.c
@@ -1,45 +1,84 @@
 #include <stdbool.h>
+#include <stdatomic.h>
+#include <string.h>
+#include "u_can.h"
+#include "can_messages_rx.h"
 #include "u_statemachine.h"
 #include "u_mutexes.h"
 
-static Lightning_Board_Light_Status current_state = LIGHT_OFF;
+/* First contact trackers. */
+static _Atomic bool has_bms_made_contact = false;
+static _Atomic bool has_imd_made_contact = false;
+// These bools track whether or not we've recieved any "okay" messages from BMS or IMD.
+// Obviously, on startup, we won't have recieved any yet. So, these start as `false`, and remain so until the first "okay" messages are recieved from BMS and IMD respectively (i.e., "first contact" is made).
+// While either of these bools are still `false`, the statemachine will always return LIGHT_OFF, indicating that we are still in our startup phase.
+// Once both bools are `true`, meaning that we have actual "okay" states reported from both BMS and IMD, the statemachine will return either LIGHT_GREEN or LIGHT_RED based on those states.
 
-uint8_t set_statemachine(Lightning_Board_Light_Status state) {
-    int status = mutex_get(&state_machine_mutex);
+/* "Okay" Statuses. */
+static _Atomic bool bms_error; // Is the BMS okay? false = bms is okay, true = bms is NOT okay.
+static _Atomic bool imd_error; // Is the IMD okay? false = imd is okay, true = imd is NOT okay.
+// These values are updated via CAN messages that are sent from the BMS and IMD.
+// As explained in the "first contact trackers" section, these bools are not used by the statemachine until at least one "okay" message has been received from each board.
 
-    if (status != TX_SUCCESS) {
-        PRINTLN_ERROR("ERROR: Failed to get statemachine mutex. (Status: %d/%s).", status, tx_status_toString(status));
-        return U_ERROR;
-    }
-
-    current_state = state;
-
-    status = mutex_put(&state_machine_mutex);
+/* Handles the IMD status message. */
+#define _GET_BIT(data, bit) (((data) & (1U << (bit))) != 0U)
+void statemachine_handleIMDMessage(can_msg_t* message) {
+    /* Extract the warnings and alarms field (bytes 4 and 5 of the message). */
+    uint16_t warnings_and_alarms = 0;
+    memcpy(&warnings_and_alarms, &message->data[4], 2); // Copy over two bytes of the message, starting at byte 4. This should result in byte 4 and byte 5 being copied over.
+    
+    /* Get all the bit states from the register. */
+    bool device_error_active = _GET_BIT(warnings_and_alarms, 0); // true = device error active
+    bool HV_pos_connection_failure = _GET_BIT(warnings_and_alarms, 1); // true = HV_pos connection failure
+    bool HV_neg_connection_failure = _GET_BIT(warnings_and_alarms, 2); // true = HV_neg connection failure
+    bool Earth_connection_failure = _GET_BIT(warnings_and_alarms, 3); // true = Earth connection failure
+    bool Iso_alarm = _GET_BIT(warnings_and_alarms, 4); // true = Iso value below threshold error
+    bool Iso_warning = _GET_BIT(warnings_and_alarms, 5); // true = Iso value below treshold warning
+    bool Iso_outdated = _GET_BIT(warnings_and_alarms, 6); // true = Iso outdated
+    bool Unbalance_alarm = _GET_BIT(warnings_and_alarms, 7); // true = unbalane value below threshold
+    bool Undervoltage_alarm = _GET_BIT(warnings_and_alarms, 8); // true = undervoltage alarm
+    bool Unsafe_to_start = _GET_BIT(warnings_and_alarms, 9); // true = Unsafe to start
+    bool Earthlift_open = _GET_BIT(warnings_and_alarms, 10); // true = Earthlift open
 
-    if (status != TX_SUCCESS) {
-        PRINTLN_ERROR("ERROR: Failed to put statemachine mutex. (Status: %d/%s).", status, tx_status_toString(status));
-        return U_ERROR;
-    }
+    /* Do we have an error? */
+    imd_error = 
+    device_error_active ||
+    HV_pos_connection_failure ||
+    HV_neg_connection_failure ||
+    Earth_connection_failure ||
+    Iso_alarm ||
+    Iso_warning ||
+    Iso_outdated ||
+    Unbalance_alarm ||
+    Undervoltage_alarm ||
+    Unsafe_to_start ||
+    Earthlift_open;
+    // Right now, if any of these are true, we are considering it an error.
 
-    return U_SUCCESS;
+    /* Update `has_imd_made_contact`, since we have made contact if this has been called. */
+    has_imd_made_contact = true;
 }
 
-Lightning_Board_Light_Status get_current_state() {
-    int status = mutex_get(&state_machine_mutex);
+/* Handles the BMS status message. */
+void statemachine_handleBMSMessage(can_msg_t* message) {
+    bms_critically_faulted_t data = { 0 };
+    receive_bms_critically_faulted(message, &data);
+    PRINTLN_INFO("bms critically faulted=%d", data.critically_faulted);
+    bms_error = data.critically_faulted;
+    has_bms_made_contact = true;
+}
 
-    if (status != TX_SUCCESS) {
-        PRINTLN_ERROR("ERROR: Failed to get statemachine mutex. (Status: %d/%s).", status, tx_status_toString(status));
+Lightning_Board_Light_Status statemachine_getState() {
+    /* If we haven't made first contact yet from either board, just return LIGHT_OFF. */
+    if(!has_bms_made_contact || !has_imd_made_contact) {
         return LIGHT_OFF;
     }
     
-    Lightning_Board_Light_Status state = current_state;
-    
-    status = mutex_put(&state_machine_mutex);
-
-    if (status != TX_SUCCESS) {
-        PRINTLN_ERROR("ERROR: Failed to put statemachine mutex. (Status: %d/%s).", status, tx_status_toString(status));
-        return state;
+    /* If either the BMS or IMD has an error, return LIGHT_RED. */
+    if(bms_error || imd_error) {
+        return LIGHT_RED;
     }
 
-    return current_state;
+    /* If everything is good, return LIGHT_GREEN. */
+    return LIGHT_GREEN;
 }
diff --git a/Core/Src/u_test.c b/Core/Src/u_test.c
index a147228..56f5177 100644
--- a/Core/Src/u_test.c
+++ b/Core/Src/u_test.c
@@ -3,10 +3,5 @@
 #include "u_test.h"
 
 void gpio_test() {
-    uint8_t value = rand() % 3;
-    uint8_t status = set_statemachine((Lightning_Board_Light_Status) value);
-
-    if (status != U_SUCCESS) {
-        PRINTLN_ERROR("Failed to set State in GPIO Test");
-    }
+    return;
 }
\ No newline at end of file
diff --git a/Core/Src/u_threads.c b/Core/Src/u_threads.c
index 551d079..41b6cfc 100644
--- a/Core/Src/u_threads.c
+++ b/Core/Src/u_threads.c
@@ -5,6 +5,7 @@
 #include "u_can.h"
 #include "u_sensors.h"
 #include "bitstream.h"
+#include "u_lights.h"
 #include "u_statemachine.h"
 #include "u_mutexes.h"
 #include "u_test.h"
@@ -144,20 +145,17 @@ static thread_t _gpio_lights_thread = {
 void gpio_lights_thread(ULONG thread_input) {
 
     while (1) {
-        Lightning_Board_Light_Status state = get_current_state();
+        Lightning_Board_Light_Status state = statemachine_getState();
 
         switch (state) {
             case LIGHT_GREEN:
-                HAL_GPIO_WritePin(RED_GPIO_Port, RED_Pin, GPIO_PIN_RESET);
-                HAL_GPIO_WritePin(GREEN_GPIO_Port, GREEN_Pin, GPIO_PIN_SET);
+                lights_setGreen();
                 break;
             case LIGHT_RED:
-                HAL_GPIO_WritePin(GREEN_GPIO_Port, GREEN_Pin, GPIO_PIN_RESET);
-                HAL_GPIO_WritePin(RED_GPIO_Port, RED_Pin, GPIO_PIN_SET);
+                lights_setRed();
                 break;
             case LIGHT_OFF:
-                HAL_GPIO_WritePin(GREEN_GPIO_Port, GREEN_Pin, GPIO_PIN_RESET);
-                HAL_GPIO_WritePin(RED_GPIO_Port, RED_Pin, GPIO_PIN_RESET);
+                lights_setOff();
                 break;
             default:
                 PRINTLN_WARNING("State machine state is not in range %d", state);
diff --git a/Drivers/Embedded-Base b/Drivers/Embedded-Base
index f521b40..06e8138 160000
--- a/Drivers/Embedded-Base
+++ b/Drivers/Embedded-Base
@@ -1 +1 @@
-Subproject commit f521b40acd1e11c6e2b2bc97088f8a4d1da483bf
+Subproject commit 06e81382bd4696dbd98dfa0590bf15d8970502cc
diff --git a/Drivers/Odyssey-Definitions b/Drivers/Odyssey-Definitions
index d697be7..b67b753 160000
--- a/Drivers/Odyssey-Definitions
+++ b/Drivers/Odyssey-Definitions
@@ -1 +1 @@
-Subproject commit d697be720260bef5acfb409c7c907eb36df52617
+Subproject commit b67b7533c5636a94dbcd7af885597036bc2c3d62
diff --git a/Lightning.ioc b/Lightning.ioc
index c5074c1..be35142 100644
--- a/Lightning.ioc
+++ b/Lightning.ioc
@@ -9,12 +9,15 @@ CORTEX_M33_NS.userName=CORTEX_M33
 FDCAN2.CalculateBaudRateNominal=500000
 FDCAN2.CalculateTimeBitNominal=2000
 FDCAN2.CalculateTimeQuantumNominal=200.0
-FDCAN2.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalPrescaler,NominalTimeSeg1,StdFiltersNbr
+FDCAN2.ExtFiltersNbr=8
+FDCAN2.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalPrescaler,NominalTimeSeg1,StdFiltersNbr,ExtFiltersNbr
 FDCAN2.NominalPrescaler=5
 FDCAN2.NominalTimeSeg1=8
-FDCAN2.StdFiltersNbr=1
+FDCAN2.StdFiltersNbr=28
 File.Version=6
 GPIO.groupedBy=Group By Peripherals
+IWDG.IPParameters=Prescaler
+IWDG.Prescaler=IWDG_PRESCALER_32
 KeepUserPlacement=false
 LPUART1.BaudRate=115200
 LPUART1.DataInvertParam=UART_ADVFEATURE_DATAINV_DISABLE
@@ -57,23 +60,24 @@ Mcu.ContextProject=TrustZoneDisabled
 Mcu.Family=STM32H5
 Mcu.IP0=BOOTPATH
 Mcu.IP1=CORTEX_M33_NS
-Mcu.IP10=PWR
-Mcu.IP11=RCC
-Mcu.IP12=SPI1
-Mcu.IP13=SPI2
-Mcu.IP14=SPI3
-Mcu.IP15=SYS
-Mcu.IP16=THREADX
-Mcu.IP17=UART4
+Mcu.IP10=NVIC
+Mcu.IP11=PWR
+Mcu.IP12=RCC
+Mcu.IP13=SPI1
+Mcu.IP14=SPI2
+Mcu.IP15=SPI3
+Mcu.IP16=SYS
+Mcu.IP17=THREADX
+Mcu.IP18=UART4
 Mcu.IP2=DCACHE1
 Mcu.IP3=DEBUG
 Mcu.IP4=FDCAN2
 Mcu.IP5=ICACHE
-Mcu.IP6=LPUART1
-Mcu.IP7=MEMORYMAP
-Mcu.IP8=NETXDUO
-Mcu.IP9=NVIC
-Mcu.IPNb=18
+Mcu.IP6=IWDG
+Mcu.IP7=LPUART1
+Mcu.IP8=MEMORYMAP
+Mcu.IP9=NETXDUO
+Mcu.IPNb=19
 Mcu.Name=STM32H563ZITx
 Mcu.Package=LQFP144
 Mcu.Pin0=PE2
@@ -103,20 +107,21 @@ Mcu.Pin3=PE5
 Mcu.Pin30=VP_CORTEX_M33_NS_VS_Hclk
 Mcu.Pin31=VP_DCACHE1_VS_DCACHE
 Mcu.Pin32=VP_ICACHE_VS_ICACHE
-Mcu.Pin33=VP_NETXDUO_VS_NXOoCore
-Mcu.Pin34=VP_PWR_VS_SECSignals
-Mcu.Pin35=VP_PWR_VS_LPOM
-Mcu.Pin36=VP_SYS_VS_tim2
-Mcu.Pin37=VP_THREADX_VS_RTOSJjThreadXJjCoreJjDefault
-Mcu.Pin38=VP_BOOTPATH_VS_BOOTPATH
-Mcu.Pin39=VP_MEMORYMAP_VS_MEMORYMAP
+Mcu.Pin33=VP_IWDG_VS_IWDG
+Mcu.Pin34=VP_NETXDUO_VS_NXOoCore
+Mcu.Pin35=VP_PWR_VS_SECSignals
+Mcu.Pin36=VP_PWR_VS_LPOM
+Mcu.Pin37=VP_SYS_VS_tim2
+Mcu.Pin38=VP_THREADX_VS_RTOSJjThreadXJjCoreJjDefault
+Mcu.Pin39=VP_BOOTPATH_VS_BOOTPATH
 Mcu.Pin4=PC13
+Mcu.Pin40=VP_MEMORYMAP_VS_MEMORYMAP
 Mcu.Pin5=PH0-OSC_IN(PH0)
 Mcu.Pin6=PH1-OSC_OUT(PH1)
 Mcu.Pin7=PC2
 Mcu.Pin8=PC3
 Mcu.Pin9=PA0
-Mcu.PinsNb=40
+Mcu.PinsNb=41
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32H563ZITx
@@ -127,6 +132,7 @@ NETXDUO.NX_APP_MEM_POOL_SIZE=10240
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.FDCAN2_IT0_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.FDCAN2_IT1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
@@ -254,7 +260,7 @@ ProjectManager.ToolChainLocation=
 ProjectManager.UAScriptAfterPath=
 ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_SPI2_Init-SPI2-false-HAL-true,6-MX_SPI3_Init-SPI3-false-HAL-true,7-MX_ICACHE_Init-ICACHE-false-HAL-true,8-MX_NetXDuo_Init-NETXDUO-false-HAL-false,9-MX_FDCAN2_Init-FDCAN2-false-HAL-true,10-MX_UART4_Init-UART4-false-HAL-true,11-MX_DCACHE1_Init-DCACHE1-false-HAL-true,0-MX_CORTEX_M33_NS_Init-CORTEX_M33_NS-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_SPI2_Init-SPI2-false-HAL-true,6-MX_SPI3_Init-SPI3-false-HAL-true,7-MX_ICACHE_Init-ICACHE-false-HAL-true,8-MX_NetXDuo_Init-NETXDUO-false-HAL-false,9-MX_FDCAN2_Init-FDCAN2-false-HAL-true,10-MX_UART4_Init-UART4-false-HAL-true,11-MX_DCACHE1_Init-DCACHE1-false-HAL-true,12-MX_IWDG_Init-IWDG-false-HAL-true,0-MX_CORTEX_M33_NS_Init-CORTEX_M33_NS-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
 RCC.ADCFreq_Value=175000000
 RCC.AHBFreq_Value=175000000
 RCC.APB1Freq_Value=175000000
@@ -355,26 +361,32 @@ RCC.VCOPLL2OutputFreq_Value=320000000
 RCC.VCOPLL3OutputFreq_Value=516000000
 SH.GPXTI2.0=GPIO_EXTI2
 SH.GPXTI2.ConfNb=1
-SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
-SPI1.CalculateBaudRate=8.0 MBits/s
+SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_32
+SPI1.CalculateBaudRate=2.0 MBits/s
 SPI1.DataSize=SPI_DATASIZE_8BIT
 SPI1.Direction=SPI_DIRECTION_2LINES
-SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler
+SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler,NSSPMode,MasterKeepIOState
+SPI1.MasterKeepIOState=SPI_MASTER_KEEP_IO_STATE_ENABLE
 SPI1.Mode=SPI_MODE_MASTER
+SPI1.NSSPMode=SPI_NSS_PULSE_DISABLE
 SPI1.VirtualType=VM_MASTER
 SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
 SPI2.CalculateBaudRate=8.0 MBits/s
 SPI2.DataSize=SPI_DATASIZE_8BIT
 SPI2.Direction=SPI_DIRECTION_2LINES
-SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler
+SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler,NSSPMode,MasterKeepIOState
+SPI2.MasterKeepIOState=SPI_MASTER_KEEP_IO_STATE_ENABLE
 SPI2.Mode=SPI_MODE_MASTER
+SPI2.NSSPMode=SPI_NSS_PULSE_DISABLE
 SPI2.VirtualType=VM_MASTER
 SPI3.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
 SPI3.CalculateBaudRate=8.0 MBits/s
 SPI3.DataSize=SPI_DATASIZE_8BIT
 SPI3.Direction=SPI_DIRECTION_2LINES
-SPI3.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler,DataSize
+SPI3.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler,DataSize,NSSPMode,MasterKeepIOState
+SPI3.MasterKeepIOState=SPI_MASTER_KEEP_IO_STATE_ENABLE
 SPI3.Mode=SPI_MODE_MASTER
+SPI3.NSSPMode=SPI_NSS_PULSE_DISABLE
 SPI3.VirtualType=VM_MASTER
 THREADX.IPParameters=TX_APP_MEM_POOL_SIZE
 THREADX.TX_APP_MEM_POOL_SIZE=60040
@@ -386,6 +398,8 @@ VP_DCACHE1_VS_DCACHE.Mode=DCACHE_Activate
 VP_DCACHE1_VS_DCACHE.Signal=DCACHE1_VS_DCACHE
 VP_ICACHE_VS_ICACHE.Mode=DirectMappedCache
 VP_ICACHE_VS_ICACHE.Signal=ICACHE_VS_ICACHE
+VP_IWDG_VS_IWDG.Mode=IWDG_Activate
+VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
 VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
 VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
 VP_NETXDUO_VS_NXOoCore.Mode=NX_Core
diff --git a/cmake/stm32cubemx/CMakeLists.txt b/cmake/stm32cubemx/CMakeLists.txt
index d06b7e0..8fd91f5 100644
--- a/cmake/stm32cubemx/CMakeLists.txt
+++ b/cmake/stm32cubemx/CMakeLists.txt
@@ -28,8 +28,8 @@ set(MX_Include_Dirs
 
 # STM32CubeMX generated application sources
 set(MX_Application_Src
-    ${CMAKE_CURRENT_SOURCE_DIR}/../../NetXDuo/App/app_netxduo.c
     ${CMAKE_CURRENT_SOURCE_DIR}/../../AZURE_RTOS/App/app_azure_rtos.c
+    ${CMAKE_CURRENT_SOURCE_DIR}/../../NetXDuo/App/app_netxduo.c
     ${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/tx_initialize_low_level.S
     ${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/main.c
     ${CMAKE_CURRENT_SOURCE_DIR}/../../Core/Src/app_threadx.c