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JbalkindJbalkind
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Cleanup for l15 threadid
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+84
-141
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10 files changed

+84
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lines changed

‎piton/ariane_setup.sh‎

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
#!/bin/bash
2-
# Modified by Barcelona Supercomputing Center on March 3rd, 2022
32
# Copyright 2018 ETH Zurich and University of Bologna.
43
# Copyright and related rights are licensed under the Solderpad Hardware
54
# License, Version 0.51 (the "License"); you may not use this file except in
@@ -52,11 +51,8 @@ echo "make sure that you source this script in a bash shell in the root folder o
5251

5352
if [ -z "$BASH" ] || [ ${0: -4} != "bash" ]
5453
then
55-
#echo "not in bash ($0), aborting"
56-
# Commentted out, as it is not really an issue and it may fail when running the CICD
57-
echo "not in bash ($0)"
58-
#return
59-
54+
echo "not in bash ($0), aborting"
55+
return
6056
fi
6157

6258
SCRIPTNAME=ariane_setup.sh
@@ -80,15 +76,18 @@ export ARIANE_ROOT=${PITON_ROOT}/piton/design/chip/tile/ariane/
8076
export CXX=g++ CC=gcc
8177
# customize this to a fast local disk
8278

83-
export RISCV=~/scratch/`whoami`/riscv_install
84-
export VERILATOR_ROOT=~/scratch/`whoami`/verilator_4_104/
79+
if [ "$RISCV" == "" ]
80+
then
81+
export RISCV=$HOME/scratch/riscv_install
82+
fi
83+
export VERILATOR_ROOT=$ARIANE_ROOT/tmp/verilator-4.014/
84+
8585
# setup paths
8686
export PATH=$RISCV/bin:$VERILATOR_ROOT/bin:$PATH
8787
export LIBRARY_PATH=$RISCV/lib
88-
export LD_LIBRARY_PATH=$RISCV/lib:$LD_LIBRARY_PATH
89-
export C_INCLUDE_PATH=$RISCV/include:$VERILATOR_ROOT/include:$C_INCLUDE_PATH
90-
export CPLUS_INCLUDE_PATH=$RISCV/include:$VERILATOR_ROOT/include:$CPLUS_INCLUDE_PATH
91-
export MODELSIM_HOME=$HOME/scratch/questa_install/questasim
88+
export LD_LIBRARY_PATH=$RISCV/lib
89+
export C_INCLUDE_PATH=$RISCV/include:$VERILATOR_ROOT/include
90+
export CPLUS_INCLUDE_PATH=$RISCV/include:$VERILATOR_ROOT/include
9291

9392
# source OpenPiton setup script
9493
# note: customize this script to reflect your tool setup

‎piton/design/chip/tile/l15/rtl/l15_mshr.v.pyv‎

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -163,24 +163,24 @@ integer i=0;
163163
always @ *
164164
begin
165165

166-
for(i = 0; i < `L15_NUM_THREADS; i = i+1)
167-
begin
166+
for(i = 0; i < `L15_NUM_THREADS; i = i+1)
167+
begin
168168
tmp_vals[i] = 0;
169169
tmp_vals[i][`L15_MSHR_ID_IFILL] = ifill_val[i];
170-
tmp_vals[i][`L15_MSHR_ID_LD] = ld_val[i];
171-
tmp_vals[i][`L15_MSHR_ID_ST] = st_val[i];
170+
tmp_vals[i][`L15_MSHR_ID_LD] = ld_val[i];
171+
tmp_vals[i][`L15_MSHR_ID_ST] = st_val[i];
172172

173173
tmp_st_address[i] = st_address[i];
174174
tmp_ld_address[i] = ld_address[i];
175-
tmp_st_way[i] = st_way[i];
176-
tmp_st_state[i] = st_state[i];
175+
tmp_st_way[i] = st_way[i];
176+
tmp_st_state[i] = st_state[i];
177177

178-
mshr_pipe_vals_s1[(`L15_NUM_MSHRID_PER_THREAD*(i+1))-1 -: `L15_NUM_MSHRID_PER_THREAD] = tmp_vals[i];
179-
mshr_pipe_ld_address[(`L15_PADDR_WIDTH*(i+1))-1 -: `L15_PADDR_WIDTH] = tmp_ld_address[i];
180-
mshr_pipe_st_address[(`L15_PADDR_WIDTH*(i+1))-1 -: `L15_PADDR_WIDTH] = tmp_st_address[i];
181-
mshr_pipe_st_way_s1[(2*(i+1))-1 -: 2] = tmp_st_way[i];
182-
mshr_pipe_st_state_s1[(`L15_MESI_TRANS_STATE_WIDTH*(i+1))-1 -: `L15_MESI_TRANS_STATE_WIDTH] = tmp_st_state[i];
183-
end
178+
mshr_pipe_vals_s1[(`L15_NUM_MSHRID_PER_THREAD*(i+1))-1 -: `L15_NUM_MSHRID_PER_THREAD] = tmp_vals[i];
179+
mshr_pipe_ld_address[(`L15_PADDR_WIDTH*(i+1))-1 -: `L15_PADDR_WIDTH] = tmp_ld_address[i];
180+
mshr_pipe_st_address[(`L15_PADDR_WIDTH*(i+1))-1 -: `L15_PADDR_WIDTH] = tmp_st_address[i];
181+
mshr_pipe_st_way_s1[(2*(i+1))-1 -: 2] = tmp_st_way[i];
182+
mshr_pipe_st_state_s1[(`L15_MESI_TRANS_STATE_WIDTH*(i+1))-1 -: `L15_MESI_TRANS_STATE_WIDTH] = tmp_st_state[i];
183+
end
184184

185185

186186
// S1 read
@@ -361,11 +361,11 @@ always @ (posedge clk)
361361
begin
362362
if (!rst_n)
363363
begin
364-
for(i = 0; i < `L15_NUM_THREADS; i = i+1)
365-
begin
366-
st_homeid[i] <= '0;
367-
ld_homeid[i] <= '0;
368-
end
364+
for(i = 0; i < `L15_NUM_THREADS; i = i+1)
365+
begin
366+
st_homeid[i] <= {PACKET_HOME_ID_WIDTH{1'b0}};
367+
ld_homeid[i] <= {PACKET_HOME_ID_WIDTH{1'b0}};
368+
end
369369
end
370370
else
371371
begin

‎piton/design/chip/tile/l15/rtl/l15_pipeline.v.pyv‎

Lines changed: 44 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -404,27 +404,15 @@ begin
404404
// predecode_mshr_read_address_s1 = mshr_pipe_address_s1;
405405
predecode_mshr_read_homeid_s1 = mshr_pipe_readres_homeid_s1;
406406

407-
// mshr_val_array
408-
//mshr_val_array[0] = mshr_pipe_vals_s1[`L15_NUM_MSHRID_PER_THREAD*1 - 1 -: `L15_NUM_MSHRID_PER_THREAD];
409-
//mshr_st_state_array[0] = mshr_pipe_st_state_s1[`L15_MESI_TRANS_STATE_WIDTH*1 - 1 -: `L15_MESI_TRANS_STATE_WIDTH];
410-
//mshr_st_address_array[0] = mshr_pipe_st_address[`L15_PADDR_WIDTH*1 - 1 -: `L15_PADDR_WIDTH];
411-
//mshr_ld_address_array[0] = mshr_pipe_ld_address[`L15_PADDR_WIDTH*1 - 1 -: `L15_PADDR_WIDTH];
412-
//mshr_st_way_array[0] = mshr_pipe_st_way_s1[2*1 - 1 -: 2];
413-
//
414-
//mshr_val_array[1] = mshr_pipe_vals_s1[`L15_NUM_MSHRID_PER_THREAD*2 - 1 -: `L15_NUM_MSHRID_PER_THREAD];
415-
//mshr_st_state_array[1] = mshr_pipe_st_state_s1[`L15_MESI_TRANS_STATE_WIDTH*2 - 1 -: `L15_MESI_TRANS_STATE_WIDTH];
416-
//mshr_st_address_array[1] = mshr_pipe_st_address[`L15_PADDR_WIDTH*2 - 1 -: `L15_PADDR_WIDTH];
417-
//mshr_ld_address_array[1] = mshr_pipe_ld_address[`L15_PADDR_WIDTH*2 - 1 -: `L15_PADDR_WIDTH];
418-
//mshr_st_way_array[1] = mshr_pipe_st_way_s1[2*2 - 1 -: 2];
419-
420-
for(i = 0; i < `L15_NUM_THREADS; i = i+1)
421-
begin
422-
mshr_val_array[i] = mshr_pipe_vals_s1[`L15_NUM_MSHRID_PER_THREAD*(i+1) - 1 -: `L15_NUM_MSHRID_PER_THREAD];
423-
mshr_st_state_array[i] = mshr_pipe_st_state_s1[`L15_MESI_TRANS_STATE_WIDTH*(i+1) - 1 -: `L15_MESI_TRANS_STATE_WIDTH];
424-
mshr_st_address_array[i] = mshr_pipe_st_address[`L15_PADDR_WIDTH*(i+1) - 1 -: `L15_PADDR_WIDTH];
425-
mshr_ld_address_array[i] = mshr_pipe_ld_address[`L15_PADDR_WIDTH*(i+1) - 1 -: `L15_PADDR_WIDTH];
426-
mshr_st_way_array[i] = mshr_pipe_st_way_s1[`L15_WAY_WIDTH*(i+1) - 1 -: `L15_WAY_WIDTH];
427-
end
407+
// mshr_val_array
408+
for(i = 0; i < `L15_NUM_THREADS; i = i+1)
409+
begin
410+
mshr_val_array[i] = mshr_pipe_vals_s1[`L15_NUM_MSHRID_PER_THREAD*(i+1) - 1 -: `L15_NUM_MSHRID_PER_THREAD];
411+
mshr_st_state_array[i] = mshr_pipe_st_state_s1[`L15_MESI_TRANS_STATE_WIDTH*(i+1) - 1 -: `L15_MESI_TRANS_STATE_WIDTH];
412+
mshr_st_address_array[i] = mshr_pipe_st_address[`L15_PADDR_WIDTH*(i+1) - 1 -: `L15_PADDR_WIDTH];
413+
mshr_ld_address_array[i] = mshr_pipe_ld_address[`L15_PADDR_WIDTH*(i+1) - 1 -: `L15_PADDR_WIDTH];
414+
mshr_st_way_array[i] = mshr_pipe_st_way_s1[`L15_WAY_WIDTH*(i+1) - 1 -: `L15_WAY_WIDTH];
415+
end
428416

429417
end
430418

@@ -450,10 +438,6 @@ reg predecode_tagcheck_matched_trd_ld_s1 [`L15_THREAD_ARRAY_MASK]; // each eleme
450438
reg predecode_tagcheck_matched_trd_st_s1 [`L15_THREAD_ARRAY_MASK];
451439
reg predecode_tagcheck_matched_lds_s1;
452440
reg predecode_tagcheck_matched_sts_s1;
453-
//reg predecode_tagcheck_matched_t0ld_s1;
454-
//reg predecode_tagcheck_matched_t0st_s1;
455-
//reg predecode_tagcheck_matched_t1ld_s1;
456-
//reg predecode_tagcheck_matched_t1st_s1;
457441

458442
reg predecode_int_vec_dis_s1;
459443
reg predecode_tagcheck_matched_s1;
@@ -850,28 +834,26 @@ begin
850834

851835
// TAG CHECKING
852836
predecode_partial_tag_s1[19:4] = pcxdecoder_l15_address[19:4]; // compare partial tag to save energy & timing
853-
predecode_tagcheck_matched_lds_s1 = 0;
854-
predecode_tagcheck_matched_sts_s1 = 0;
837+
predecode_tagcheck_matched_lds_s1 = 0;
838+
predecode_tagcheck_matched_sts_s1 = 0;
855839

856-
for(i = 0; i < `L15_NUM_THREADS; i = i+1)
857-
begin
858-
predecode_tagcheck_matched_trd_ld_s1[i] = mshr_val_array[i][`L15_MSHR_ID_LD]
840+
for(i = 0; i < `L15_NUM_THREADS; i = i+1)
841+
begin
842+
predecode_tagcheck_matched_trd_ld_s1[i] = mshr_val_array[i][`L15_MSHR_ID_LD]
859843
&& (predecode_partial_tag_s1[19:4] == mshr_ld_address_array[i][19:4]);
860-
predecode_tagcheck_matched_trd_st_s1[i] = mshr_val_array[i][`L15_MSHR_ID_ST]
861-
&& (pcxdecoder_l15_address[39:4] == mshr_st_address_array[i][39:4]);
844+
predecode_tagcheck_matched_trd_st_s1[i] = mshr_val_array[i][`L15_MSHR_ID_ST]
845+
&& (pcxdecoder_l15_address[39:4] == mshr_st_address_array[i][39:4]);
862846

863-
predecode_tagcheck_matched_lds_s1 = predecode_tagcheck_matched_trd_ld_s1[i] | predecode_tagcheck_matched_lds_s1;
864-
predecode_tagcheck_matched_sts_s1 = predecode_tagcheck_matched_trd_st_s1[i] | predecode_tagcheck_matched_sts_s1;
865-
866-
if(predecode_tagcheck_matched_trd_st_s1[i] == 1)
867-
predecode_hit_stbuf_threadid_s1 = i;
847+
predecode_tagcheck_matched_lds_s1 = predecode_tagcheck_matched_trd_ld_s1[i] | predecode_tagcheck_matched_lds_s1;
848+
predecode_tagcheck_matched_sts_s1 = predecode_tagcheck_matched_trd_st_s1[i] | predecode_tagcheck_matched_sts_s1;
868849

869-
end
850+
if(predecode_tagcheck_matched_trd_st_s1[i] == 1)
851+
predecode_hit_stbuf_threadid_s1 = i;
852+
end
870853

871-
predecode_tagcheck_matched_s1 = predecode_tagcheck_matched_lds_s1 | predecode_tagcheck_matched_sts_s1;
854+
predecode_tagcheck_matched_s1 = predecode_tagcheck_matched_lds_s1 | predecode_tagcheck_matched_sts_s1;
872855
// misc
873856
predecode_hit_stbuf_s1 = predecode_tagcheck_matched_sts_s1;
874-
//predecode_hit_stbuf_threadid_s1 = predecode_tagcheck_matched_t1st_s1 ? 1'b1 : 1'b0;
875857
// note: only work with 2 threads for now; need to change the algo of mshr if need to increase the num of threads
876858
end
877859

@@ -3326,31 +3308,35 @@ reg [`L15_UNPARAM_1_0] stbuf_way_s3; // wmt todo: move calculation to s2
33263308
always @ *
33273309
begin
33283310

3329-
stbuf_compare_match_val_s3 = 0;
3330-
stbuf_compare_lru_match_val_s3 = 0;
3331-
for(i = 0; i < `L15_NUM_THREADS; i = i+1)
3332-
begin
3333-
`ifdef PITON_ASIC_RTL
3334-
stbuf_compare_address_match_s3[i] = mshr_st_address_array[i][10:4] == cache_index_s3;
3335-
`else
3336-
stbuf_compare_address_match_s3[i] = mshr_st_address_array[i][39:4] == address_s3[39:4];
3337-
`endif
3311+
stbuf_compare_match_val_s3 = 0;
3312+
stbuf_compare_lru_match_val_s3 = 0;
3313+
for(i = 0; i < `L15_NUM_THREADS; i = i+1)
3314+
begin
3315+
`ifdef PITON_ASIC_RTL
3316+
stbuf_compare_address_match_s3[i] = mshr_st_address_array[i][10:4] == cache_index_s3;
3317+
`else
3318+
stbuf_compare_address_match_s3[i] = mshr_st_address_array[i][39:4] == address_s3[39:4];
3319+
`endif
33383320

3339-
stbuf_compare_match_s3[i] = mshr_val_array[i][`L15_MSHR_ID_ST]
3340-
&& (mshr_st_state_array[i] == `L15_MESI_TRANSITION_STATE_SM)
3341-
&& (stbuf_compare_address_match_s3[i] == 1'b1);
3321+
stbuf_compare_match_s3[i] = mshr_val_array[i][`L15_MSHR_ID_ST]
3322+
&& (mshr_st_state_array[i] == `L15_MESI_TRANSITION_STATE_SM)
3323+
&& (stbuf_compare_address_match_s3[i] == 1'b1);
33423324

3343-
stbuf_compare_lru_match_s3[i] = stbuf_compare_match_s3[i] && (mshr_st_way_array[i] == lru_way_s3);
3325+
stbuf_compare_lru_match_s3[i] = stbuf_compare_match_s3[i] && (mshr_st_way_array[i] == lru_way_s3);
33443326

3345-
if (stbuf_compare_match_s3[i] == 1)
3327+
if (stbuf_compare_match_s3[i] == 1)
3328+
begin
33463329
stbuf_compare_threadid_s3 = i;
3330+
end
33473331

3348-
if (stbuf_compare_lru_match_s3[i] == 1)
3332+
if (stbuf_compare_lru_match_s3[i] == 1)
3333+
begin
33493334
stbuf_compare_lru_threadid_s3 = i;
3335+
end
33503336

3351-
stbuf_compare_match_val_s3 = stbuf_compare_match_s3[i] | stbuf_compare_match_val_s3;
3352-
stbuf_compare_lru_match_val_s3 = stbuf_compare_lru_match_s3[i] | stbuf_compare_lru_match_val_s3;
3353-
end
3337+
stbuf_compare_match_val_s3 = stbuf_compare_match_s3[i] | stbuf_compare_match_val_s3;
3338+
stbuf_compare_lru_match_val_s3 = stbuf_compare_lru_match_s3[i] | stbuf_compare_lru_match_val_s3;
3339+
end
33543340

33553341
stbuf_way_s3 = mshr_st_way_array[stbuf_compare_threadid_s3];
33563342
// stbuf_way_wmt_data_s3 = wmt_data_s3[stbuf_way_s3];

‎piton/design/chip/tile/l15/rtl/noc2decoder.v‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -104,11 +104,11 @@ begin
104104
// the threadid is encoded in the mshrid sent to L2, is the next L15_THREADID_WIDTH bits after the first L15_MSHR_ID_WIDTH bits
105105
noc2decoder_l15_threadid = noc2_mshrid[`L15_MSHR_ID_WIDTH+`L15_THREADID_WIDTH -1 -: `L15_THREADID_WIDTH];
106106

107-
`ifdef NO_RTL_CSM
108-
noc2decoder_l15_hmc_fill = 1'b0; //noc2_mshrid[`MSG_MSHRID_WIDTH-1];
109-
`else
110-
noc2decoder_l15_hmc_fill = noc2_mshrid[`MSG_MSHRID_WIDTH-1];
111-
`endif
107+
`ifdef NO_RTL_CSM
108+
noc2decoder_l15_hmc_fill = 1'b0; //noc2_mshrid[`MSG_MSHRID_WIDTH-1];
109+
`else
110+
noc2decoder_l15_hmc_fill = noc2_mshrid[`MSG_MSHRID_WIDTH-1];
111+
`endif
112112

113113
noc2decoder_l15_l2miss = noc2_data[`MSG_L2_MISS];
114114
noc2decoder_l15_icache_type = noc2_data[`MSG_CACHE_TYPE];

‎piton/design/include/l15.h.pyv‎

Lines changed: 3 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -85,6 +85,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
8585
print("`define L15_WMT_ALIAS_WIDTH %d" % int(math.log(l15_set_count/l1d_set_count, 2)))
8686

8787
print("`define L15_CACHELINE_WIDTH %d" % (L15_LINE_SIZE*8))
88+
89+
print("`define L15_NUM_THREADS %d" % CONFIG_L15_NUM_THREADS)
90+
print("`define L15_THREADID_WIDTH %d" % int(math.log(CONFIG_L15_NUM_THREADS, 2)))
8891
%>
8992

9093
`define L15_MESI_STATE_WIDTH 2
@@ -210,13 +213,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
210213
`define L15_MSHR_ID_ST 2'd3
211214

212215
// if NO_RTL_CSM is defined L15_NUM_THREADS could go up to 64, otherwise 32.
213-
<%
214-
import math
215-
import pyhplib
216-
from pyhplib import *
217-
print("`define L15_NUM_THREADS %d" % L15_NUM_THREADS)
218-
print("`define L15_THREADID_WIDTH %d" % int(math.log(L15_NUM_THREADS, 2)))
219-
%>
220216
`define L15_THREADID_MASK `L15_THREADID_WIDTH-1:0
221217
`define L15_THREAD_ARRAY_MASK `L15_NUM_THREADS-1:0
222218
`define L15_NUM_MSHRID_PER_THREAD 4

‎piton/tools/bin/pyhplib.py‎

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,6 @@
3232
MAX_X = 8;
3333
MAX_Y = 8;
3434

35-
36-
3735
PITON_X_TILES = int(os.environ.get('PITON_X_TILES', '-1'))
3836
#print "//x_tiles:", num_tiles
3937

@@ -74,6 +72,7 @@
7472
# cache configurations
7573
CONFIG_L15_SIZE = int(os.environ.get('CONFIG_L15_SIZE', '8192'))
7674
CONFIG_L15_ASSOCIATIVITY = int(os.environ.get('CONFIG_L15_ASSOCIATIVITY', '4'))
75+
CONFIG_L15_NUM_THREADS = int(os.environ.get('CONFIG_L15_NUM_THREADS', '2'))
7776
CONFIG_L1D_SIZE = int(os.environ.get('CONFIG_L1D_SIZE', '8192'))
7877
CONFIG_L1D_ASSOCIATIVITY = int(os.environ.get('CONFIG_L1D_ASSOCIATIVITY', '4'))
7978
CONFIG_L1I_SIZE = int(os.environ.get('CONFIG_L1I_SIZE', '16384'))
@@ -89,8 +88,6 @@
8988
L15_LINE_SIZE = 16
9089
L2_LINE_SIZE = 64
9190

92-
L15_NUM_THREADS = int(os.environ.get('L15_NUM_THREADS', '2'))
93-
9491
#########################################################
9592
# BRAM configurations
9693
#########################################################

‎piton/tools/src/sims/manycore.config‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -107,14 +107,12 @@
107107
#ifdef FLIST_ORAM
108108
-flist=$DV_ROOT/design/chip/tinyoram/rtl/Flist.oram
109109
-config_rtl=ORAM_ON"
110-
-config_rtl=NO_RTL_CSM
111110
-sim_run_args=+oram"
112111
#endif
113112

114113
// No scan chains
115114
-config_rtl=NO_SCAN
116-
-config_rtl=NO_RTL_CSM
117-
115+
118116
-config_l1i_size=16384 // default
119117
-config_l1i_associativity=4 // default
120118

‎piton/tools/src/sims/sims,2.0‎

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2637,6 +2637,7 @@ sub parse_args
26372637
"config_l1d_associativity",
26382638
"config_l15_size",
26392639
"config_l15_associativity",
2640+
"config_l15_num_threads",
26402641
"config_l2_size",
26412642
"config_l2_associativity",
26422643
);
@@ -2651,12 +2652,6 @@ sub parse_args
26512652
}
26522653
}
26532654

2654-
GetOptions (\%opt,"l15_num_threads=s",
2655-
);
2656-
if ($opt{l15_num_threads}) {
2657-
$ENV{L15_NUM_THREADS} = $opt{l15_num_threads};
2658-
}
2659-
26602655
$ENV{PROTOSYN_RUNTIME_DESIGN_PATH} = $ENV{DV_ROOT} . "/verif/env/manycore";
26612656
$ENV{PROTOSYN_RUNTIME_BOARD} = "";
26622657

‎piton/tools/verilator/mcs_map_info.h‎

Lines changed: 0 additions & 28 deletions
This file was deleted.

‎piton/tools/verilator/my_top.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ Vcmp_top* top;
3838
VerilatedVcdC* tfp;
3939
#endif
4040

41-
extern "C" void metro_mpi_init_jbus_model_call(const char *str, int oram);
41+
extern "C" void init_jbus_model_call(char *str, int oram);
4242

4343
// This is a 64-bit integer to reduce wrap over issues and
4444
// // allow modulus. You can also use a double, if you wish.

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