diff --git a/build-internals/build.zig b/build-internals/build.zig
index f2b886b29..4fd5c3c80 100644
--- a/build-internals/build.zig
+++ b/build-internals/build.zig
@@ -275,6 +275,8 @@ pub const Stack = union(enum) {
     address: usize,
     /// Place the stack at the end of the n-th ram memory region.
     ram_region_index: usize,
+    /// Place the stack at the end of the named ram memory region.
+    ram_region_name: []const u8,
     /// Place the stack at a symbol's address.
     symbol_name: []const u8,
 };
diff --git a/build.zig b/build.zig
index dbfefaa25..33fe2712a 100644
--- a/build.zig
+++ b/build.zig
@@ -340,6 +340,17 @@ pub fn MicroBuild(port_select: PortSelect) type {
                         }
                     } else @panic("no ram memory region found for setting the end-of-stack address");
                 },
+                .ram_region_name => |name| blk: {
+                    for (target.chip.memory_regions) |region| {
+                        if (region.name) |region_name| {
+                            if (std.mem.eql(u8, region_name, name)) {
+                                if (region.tag == .ram) {
+                                    break :blk .{ .address = region.offset + region.length };
+                                } else @panic("Named region found is not a ram region");
+                            }
+                        }
+                    } else @panic("no ram memory named region found for setting the end-of-stack address");
+                },
                 .symbol_name => |name| .{ .symbol_name = name },
             };
 
diff --git a/core/src/cpus/cortex_m.zig b/core/src/cpus/cortex_m.zig
index 100b7eca2..2a8e2e425 100644
--- a/core/src/cpus/cortex_m.zig
+++ b/core/src/cpus/cortex_m.zig
@@ -789,7 +789,7 @@ pub const startup_logic = struct {
         @compileError("`_vector_table` is not available in a RAM image. Use `ram_vector_table` instead.");
     } else if (using_ram_vector_table)
         .{
-            .initial_stack_pointer = microzig.config.end_of_stack,
+            .initial_stack_pointer = microzig.config.end_of_stack.address orelse @panic("EndOfStack is not define"),
             .Reset = .{ .c = microzig.cpu.startup_logic._start },
         }
     else
@@ -1003,7 +1003,7 @@ pub const debug = struct {
 };
 
 const is_ram_image = microzig.config.ram_image;
-const using_ram_vector_table = @hasField(CPU_Options, "ram_vector_table") and microzig.options.cpu.ram_vector_table;
+pub const using_ram_vector_table = @hasField(CPU_Options, "ram_vector_table") and microzig.options.cpu.ram_vector_table;
 
 pub fn export_startup_logic() void {
     if (is_ram_image) {
diff --git a/examples/stmicro/stm32/build.zig b/examples/stmicro/stm32/build.zig
index fa5ba5649..8a63f0788 100644
--- a/examples/stmicro/stm32/build.zig
+++ b/examples/stmicro/stm32/build.zig
@@ -24,7 +24,8 @@ pub fn build(b: *std.Build) void {
         .{ .target = stm32.boards.stm32f3discovery, .name = "STM32F303_HTS221", .file = "src/hts221.zig" },
         .{ .target = stm32.boards.stm32l476discovery, .name = "STM32L476Discovery_Lcd", .file = "src/stm32l476/lcd.zig" },
         .{ .target = stm32.boards.stm32l476discovery, .name = "STM32L476Discovery_Blinky", .file = "src/blinky.zig" },
-        .{ .target = stm32.boards.stm32l476discovery, .name = "STM32L476Discovery_HTS211", .file = "src/hts221.zig" },
+        .{ .target = stm32.boards.stm32l476discovery, .name = "STM32L476Discovery_HTS221", .file = "src/hts221.zig" },
+
         .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_blink", .file = "src/blinky.zig" },
         .{ .target = stm32.chips.STM32F100RB, .name = "STM32F1xx_semihost", .file = "src/semihosting.zig" }, //QEMU target: stm32vldiscovery
         .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_adc", .file = "src/stm32f1xx/adc.zig" },
diff --git a/examples/stmicro/stm32/src/hts221.zig b/examples/stmicro/stm32/src/hts221.zig
index e62579d39..f05e9d6eb 100644
--- a/examples/stmicro/stm32/src/hts221.zig
+++ b/examples/stmicro/stm32/src/hts221.zig
@@ -7,12 +7,13 @@ const HTS221 = microzig.drivers.sensor.HTS221;
 
 pub const microzig_options: microzig.Options = .{
     .logFn = microzig.board.uart_logger.log,
-    .interrupts = .{
-        .SysTick = .{ .c = systick.SysTick_handler },
+    .cpu = .{
+        .ram_vector_table = true,
     },
 };
 
 pub fn init() void {
+    stm32.dma.DMA1_Channel4.enable_interrupt();
     board.init();
     board.init_log();
     systick.init() catch {
@@ -21,6 +22,7 @@ pub fn init() void {
 }
 
 pub fn main() !void {
+    std.log.info("Starting main", .{});
     const clock = try stm32.systick_timer.clock_device();
     var i2c1 = board.i2c1();
     try i2c1.apply();
diff --git a/examples/stmicro/stm32/src/stm32f1xx/adc_dualmode.zig b/examples/stmicro/stm32/src/stm32f1xx/adc_dualmode.zig
index cd9829365..ef49d5392 100644
--- a/examples/stmicro/stm32/src/stm32f1xx/adc_dualmode.zig
+++ b/examples/stmicro/stm32/src/stm32f1xx/adc_dualmode.zig
@@ -11,7 +11,7 @@ const dma = stm32.dma;
 const AdvancedADC = stm32.adc.AdvancedADC;
 const time = stm32.time;
 
-const adc_dma = dma.Channel.init(.DMA1, 0);
+const adc_dma = dma.DMA1_Channel1;
 const uart = stm32.uart.UART.init(.USART1);
 
 const TX = gpio.Pin.from_port(.A, 9);
@@ -48,8 +48,9 @@ pub fn main() !void {
     const adc1 = AdvancedADC.init(.ADC1);
     const adc2 = AdvancedADC.init(.ADC2);
     var adc_buf: [2]AdcData = undefined;
+    const dma_channel = adc_dma.get_channel();
 
-    adc_dma.apply(.{
+    dma_channel.apply(.{
         .circular_mode = true,
         .memory_increment = true,
 
@@ -62,7 +63,7 @@ pub fn main() !void {
         .periph_address = @intFromPtr(&adc1.regs.DR),
         .mem_address = @intFromPtr(&adc_buf),
     });
-    adc_dma.start();
+    dma_channel.start();
 
     TX.set_output_mode(.alternate_function_push_pull, .max_50MHz);
     ADC_pin1.set_input_mode(.analog);
diff --git a/examples/stmicro/stm32/src/stm32f1xx/advanced_adc.zig b/examples/stmicro/stm32/src/stm32f1xx/advanced_adc.zig
index e3a0ef97c..0c32e9c13 100644
--- a/examples/stmicro/stm32/src/stm32f1xx/advanced_adc.zig
+++ b/examples/stmicro/stm32/src/stm32f1xx/advanced_adc.zig
@@ -19,7 +19,7 @@ const dma = stm32.dma;
 const AdvancedADC = stm32.adc.AdvancedADC;
 const time = stm32.time;
 
-const adc_dma = dma.Channel.init(.DMA1, 0);
+const adc_dma = dma.DMA1_Channel1;
 const uart = stm32.uart.UART.init(.USART1);
 const adc = AdvancedADC.init(.ADC1);
 
@@ -66,8 +66,9 @@ pub fn main() !void {
 
     const ref_ovf_flag: *volatile bool = &ovf_flag;
     var adc_buf: [10]u16 = .{0} ** 10;
+    const dma_channel = adc_dma.get_channel();
 
-    adc_dma.apply(.{
+    dma_channel.apply(.{
         .circular_mode = true,
         .memory_increment = true,
 
@@ -80,7 +81,7 @@ pub fn main() !void {
         .periph_address = @intFromPtr(&adc.regs.DR),
         .mem_address = @intFromPtr(&adc_buf),
     });
-    adc_dma.start();
+    dma_channel.start();
 
     //configure UART log
 
diff --git a/port/stmicro/stm32/build.zig b/port/stmicro/stm32/build.zig
index b29728714..9d2cfae46 100644
--- a/port/stmicro/stm32/build.zig
+++ b/port/stmicro/stm32/build.zig
@@ -44,6 +44,7 @@ pub fn init(dep: *std.Build.Dependency) Self {
                 .hal = microzig.HardwareAbstractionLayer{
                     .root_source_file = b.path("src/hals/STM32F303.zig"),
                 },
+                .stack = .{ .ram_region_name = "CCMRAM" },
             }),
             .stm32f4discovery = chips.STM32F407VG.derive(.{
                 .board = .{
diff --git a/port/stmicro/stm32/build.zig.zon b/port/stmicro/stm32/build.zig.zon
index 7101c4f83..1c07ecd74 100644
--- a/port/stmicro/stm32/build.zig.zon
+++ b/port/stmicro/stm32/build.zig.zon
@@ -19,5 +19,6 @@
         "build.zig",
         "build.zig.zon",
         "src",
+        "ld",
     },
 }
diff --git a/port/stmicro/stm32/ld/dma_sram.ld b/port/stmicro/stm32/ld/dma_sram.ld
new file mode 100644
index 000000000..a2d137d11
--- /dev/null
+++ b/port/stmicro/stm32/ld/dma_sram.ld
@@ -0,0 +1,14 @@
+/**
+ * Adding a buffer for DMA. This buffer need to be in 
+ * specific region so that the BuxMatrix can connect DMA and specific RAM
+ * We assume that the generated linker have a ram named SRAM connected to DMA
+ * Check the list of ram region inside the src/Chip.zig file for your target.
+ */
+
+ SECTIONS {
+    .dma_buffer (NOLOAD) :
+    {
+        KEEP(*(.dma_buffer))
+    } > SRAM
+ }
+ INSERT BEFORE .heap;
\ No newline at end of file
diff --git a/port/stmicro/stm32/src/Chips.zig b/port/stmicro/stm32/src/Chips.zig
index b22d65cba..f776db273 100644
--- a/port/stmicro/stm32/src/Chips.zig
+++ b/port/stmicro/stm32/src/Chips.zig
@@ -1428,10 +1428,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C011F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1450,10 +1453,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C011F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1472,10 +1478,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C011J4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1494,10 +1503,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C011J6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1516,10 +1528,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C031C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1538,10 +1553,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C031C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1560,10 +1578,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C031F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1582,10 +1603,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C031F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1604,10 +1628,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C031G4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1626,10 +1653,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C031G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1648,10 +1678,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C031K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1670,10 +1703,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32C031K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1692,10 +1728,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F030C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1714,10 +1753,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F030C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1736,10 +1778,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F030CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1758,10 +1803,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F030F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1780,10 +1828,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F030K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1802,10 +1853,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F030R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1824,10 +1878,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F030RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1846,10 +1903,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F031C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1868,10 +1928,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F031C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1890,10 +1953,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F031E6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1912,10 +1978,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F031F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1934,10 +2003,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F031F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1956,10 +2028,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F031G4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -1978,10 +2053,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F031G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2000,10 +2078,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F031K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2022,10 +2103,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F031K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2044,10 +2128,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F038C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2066,10 +2153,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F038E6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2088,10 +2178,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F038F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2110,10 +2203,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F038G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2132,10 +2228,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F038K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2154,10 +2253,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F042C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2176,10 +2278,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F042C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2198,10 +2303,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F042F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2220,10 +2328,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F042F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2242,10 +2353,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F042G4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2264,10 +2378,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F042G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2286,10 +2403,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F042K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2308,10 +2428,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F042K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2330,10 +2453,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F042T6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2352,10 +2478,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F048C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2374,10 +2503,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F048G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2396,10 +2528,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F048T6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2418,10 +2553,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F051C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2440,10 +2578,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F051C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2462,10 +2603,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F051C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2484,10 +2628,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F051K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2506,10 +2653,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F051K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2528,10 +2678,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F051K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2550,10 +2703,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F051R4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2572,10 +2728,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F051R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2594,10 +2753,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F051R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2616,10 +2778,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F051T8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2638,10 +2803,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F058C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2660,10 +2828,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F058R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2682,10 +2853,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F058T8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2704,10 +2878,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F070C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2726,10 +2903,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F070CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2748,10 +2928,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F070F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2770,10 +2953,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F070RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2792,10 +2978,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F071C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2814,10 +3003,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F071CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2836,10 +3028,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F071RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2858,10 +3053,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F071V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2880,10 +3078,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F071VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2902,10 +3103,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F072C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2924,10 +3128,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F072CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2946,10 +3153,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F072R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2968,10 +3178,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F072RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -2990,10 +3203,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F072V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3012,10 +3228,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F072VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3034,10 +3253,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F078CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3056,10 +3278,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F078RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3078,10 +3303,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F078VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3100,10 +3328,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F091CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3122,10 +3353,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F091CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3144,10 +3378,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F091RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3166,10 +3403,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F091RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3188,10 +3428,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F091VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3210,10 +3453,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F091VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3232,10 +3478,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F098CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3254,10 +3503,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F098RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3276,10 +3528,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F098VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3298,10 +3553,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3320,10 +3578,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3342,10 +3603,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3364,10 +3628,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3386,10 +3653,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100R4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3408,10 +3678,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3430,10 +3703,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3452,10 +3728,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3474,10 +3753,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3496,10 +3778,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100RD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3518,10 +3803,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3540,10 +3828,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3562,10 +3853,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3584,10 +3878,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3606,10 +3903,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100VD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3628,10 +3928,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3650,10 +3953,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3672,10 +3978,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100ZD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3694,10 +4003,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F100ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3716,10 +4028,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3738,10 +4053,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3760,10 +4078,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3782,10 +4103,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3804,10 +4128,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101R4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3826,10 +4153,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3848,10 +4178,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3870,10 +4203,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3892,10 +4228,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3914,10 +4253,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101RD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3936,10 +4278,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3958,10 +4303,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101RF = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -3980,11 +4328,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4003,11 +4354,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101T4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4026,10 +4380,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101T6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4048,10 +4405,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101T8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4070,10 +4430,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101TB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4092,10 +4455,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4114,10 +4480,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4136,10 +4505,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4158,10 +4530,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101VD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4180,10 +4555,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4202,10 +4580,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101VF = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4224,11 +4605,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4247,11 +4631,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4270,10 +4657,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101ZD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4292,10 +4682,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4314,10 +4707,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101ZF = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4336,11 +4732,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F101ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4359,11 +4758,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F102C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4382,10 +4784,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F102C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4404,10 +4809,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F102C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4426,10 +4834,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F102CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4448,10 +4859,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F102R4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4470,10 +4884,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F102R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4492,10 +4909,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F102R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4514,10 +4934,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F102RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4536,10 +4959,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F103C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -4558,10 +4984,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4584,10 +5013,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4610,10 +5042,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4636,10 +5071,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4662,10 +5100,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4688,10 +5129,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4714,10 +5158,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4740,10 +5187,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4766,10 +5216,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4792,10 +5245,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4818,10 +5274,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4844,11 +5303,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4871,11 +5333,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4898,10 +5363,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4924,10 +5392,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4950,10 +5421,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -4976,10 +5450,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5002,10 +5479,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5028,10 +5508,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5054,10 +5537,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5080,10 +5566,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5106,10 +5595,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5132,11 +5624,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5159,11 +5654,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5186,10 +5684,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5212,10 +5713,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5238,10 +5742,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5264,11 +5771,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5291,11 +5801,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32F103.zig"),
             .imports = hal_imports,
@@ -5318,10 +5831,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F105RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5340,10 +5856,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F105RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5362,10 +5881,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F105V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5384,10 +5906,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F105VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5406,10 +5931,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F105VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5428,10 +5956,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F107RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5450,10 +5981,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F107RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5472,10 +6006,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F107VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5494,10 +6031,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F107VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5516,10 +6056,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5538,11 +6081,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5561,11 +6107,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5584,11 +6133,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205RF = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5607,11 +6159,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5630,11 +6185,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5653,11 +6211,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5676,11 +6237,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5699,11 +6263,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205VF = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5722,11 +6289,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5745,11 +6315,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5768,11 +6341,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5791,11 +6367,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205ZF = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5814,11 +6393,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F205ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5837,11 +6419,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207IC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5860,11 +6445,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5883,11 +6471,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207IF = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5906,11 +6497,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5929,11 +6523,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5952,11 +6549,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5975,11 +6575,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207VF = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -5998,11 +6601,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6021,11 +6627,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6044,11 +6653,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6067,11 +6679,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207ZF = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6090,11 +6705,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0xC0000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F207ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6113,11 +6731,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F215RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6136,11 +6757,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F215RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6159,11 +6783,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F215VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6182,11 +6809,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F215VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6205,11 +6835,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F215ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6228,11 +6861,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F215ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6251,11 +6887,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F217IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6274,11 +6913,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F217IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6297,11 +6939,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F217VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6320,11 +6965,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F217VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6343,11 +6991,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F217ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6366,11 +7017,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F217ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6389,11 +7043,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F301C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6413,10 +7070,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F301C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6436,10 +7096,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F301K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6459,10 +7122,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F301K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6482,10 +7148,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F301R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6505,10 +7174,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F301R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6528,10 +7200,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6551,10 +7226,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6574,10 +7252,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6597,10 +7278,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6620,10 +7304,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6643,10 +7330,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6666,10 +7356,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6689,10 +7382,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6712,10 +7408,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6735,10 +7434,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6758,10 +7460,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302RD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6781,10 +7486,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6804,10 +7512,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6827,10 +7538,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6850,10 +7564,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302VD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6873,10 +7590,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6896,10 +7616,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302ZD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6919,10 +7642,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F302ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6942,10 +7668,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6965,11 +7694,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -6989,11 +7721,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7013,11 +7748,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7037,11 +7775,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7061,11 +7802,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7085,11 +7829,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7109,11 +7856,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7133,11 +7883,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7157,11 +7910,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7181,11 +7937,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303RD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7205,11 +7964,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7229,11 +7991,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7253,11 +8018,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7277,11 +8045,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303VD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7301,11 +8072,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7325,11 +8099,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303ZD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7349,11 +8126,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F303ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7373,11 +8153,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F318C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7397,10 +8180,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F318K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7420,10 +8206,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F328C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7443,11 +8232,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F334C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7467,11 +8259,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F334C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7491,11 +8286,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F334C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7515,11 +8313,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F334K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7539,11 +8340,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F334K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7563,11 +8367,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F334K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7587,11 +8394,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F334R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7611,11 +8421,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F334R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7635,11 +8448,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F358CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7659,11 +8475,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F358RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7683,11 +8502,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F358VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7707,11 +8529,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F373C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7731,10 +8556,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F373CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7754,10 +8582,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F373CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7777,10 +8608,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F373R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7800,10 +8634,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F373RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7823,10 +8660,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F373RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7846,10 +8686,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F373V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7869,10 +8712,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F373VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7892,10 +8738,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F373VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7915,10 +8764,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F378CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7938,10 +8790,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F378RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7961,10 +8816,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F378VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -7984,10 +8842,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F398VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8007,11 +8868,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8031,10 +8895,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8054,10 +8921,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401CD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8077,10 +8947,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8100,10 +8973,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8123,10 +8999,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8146,10 +9025,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401RD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8169,10 +9051,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8192,10 +9077,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8215,10 +9103,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8238,10 +9129,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401VD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8261,10 +9155,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x60000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F401VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8284,10 +9181,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F405OE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8307,12 +9207,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F405OG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8332,12 +9235,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F405RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8357,12 +9263,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F405VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8382,12 +9291,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F405ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8407,12 +9319,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F407IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8432,12 +9347,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F407IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8457,12 +9375,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F407VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8482,12 +9403,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F407VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8507,12 +9431,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F407ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8532,12 +9459,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F407ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8557,12 +9487,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1C000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2001C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F410C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8582,10 +9515,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F410CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8605,10 +9541,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F410R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8628,10 +9567,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F410RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8651,10 +9593,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F410T8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8674,10 +9619,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F410TB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8697,10 +9645,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F411CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8720,10 +9671,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F411CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8743,10 +9697,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F411RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8766,10 +9723,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F411RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8789,10 +9749,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F411VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8812,10 +9775,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F411VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8835,10 +9801,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F412CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8858,10 +9827,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F412CG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8881,10 +9853,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F412RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8904,10 +9879,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F412RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8927,10 +9905,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F412VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8950,10 +9931,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F412VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8973,10 +9957,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F412ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -8996,10 +9983,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F412ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9019,10 +10009,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F413CG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9042,10 +10035,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F413CH = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9065,10 +10061,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F413MG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9088,10 +10087,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F413MH = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9111,10 +10113,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F413RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9134,10 +10139,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F413RH = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9157,10 +10165,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F413VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9180,10 +10191,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F413VH = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9203,10 +10217,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F413ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9226,10 +10243,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F413ZH = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9249,10 +10269,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F415OG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9272,11 +10295,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F415RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9296,11 +10322,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F415VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9320,11 +10349,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F415ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9344,11 +10376,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F417IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9368,11 +10403,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F417IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9392,11 +10430,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F417VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9416,11 +10457,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F417VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9440,11 +10484,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F417ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9464,11 +10511,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F417ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9488,11 +10538,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F423CH = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9512,10 +10565,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F423MH = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9535,10 +10591,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F423RH = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9558,10 +10617,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F423VH = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9581,10 +10643,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F423ZH = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9604,10 +10669,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x180000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F427AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9627,11 +10695,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F427AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9651,13 +10722,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F427IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9677,11 +10751,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F427II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9701,13 +10778,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F427VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9727,11 +10807,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F427VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9751,13 +10834,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F427ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9777,11 +10863,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F427ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9801,13 +10890,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9827,11 +10919,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9851,13 +10946,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429BE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9877,11 +10975,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429BG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9901,11 +11002,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429BI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9925,13 +11029,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9951,11 +11058,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9975,11 +11085,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -9999,13 +11112,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429NE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10025,11 +11141,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429NG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10049,11 +11168,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10073,13 +11195,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10099,11 +11224,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10123,11 +11251,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10147,13 +11278,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10173,11 +11307,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10197,11 +11334,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F429ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10221,13 +11361,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F437AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10247,13 +11390,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F437IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10273,11 +11419,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F437II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10297,13 +11446,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F437VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10323,11 +11475,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F437VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10347,13 +11502,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F437ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10373,11 +11531,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F437ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10397,13 +11558,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10423,13 +11587,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439BG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10449,11 +11616,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439BI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10473,13 +11643,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10499,11 +11672,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10523,13 +11699,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439NG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10549,11 +11728,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10573,13 +11755,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10599,11 +11784,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10623,13 +11811,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10649,11 +11840,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F439ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10673,13 +11867,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F446MC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10699,10 +11896,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F446ME = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10722,10 +11922,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F446RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10745,10 +11948,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F446RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10768,10 +11974,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F446VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10791,10 +12000,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F446VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10814,10 +12026,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F446ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10837,10 +12052,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F446ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10860,10 +12078,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469AE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10883,11 +12104,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10907,11 +12131,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10931,13 +12158,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469BE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10957,11 +12187,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469BG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -10981,11 +12214,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469BI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11005,13 +12241,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11031,11 +12270,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11055,11 +12297,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11079,13 +12324,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469NE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11105,11 +12353,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469NG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11129,11 +12380,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11153,13 +12407,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11179,11 +12436,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11203,11 +12463,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11227,13 +12490,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11253,11 +12519,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11277,11 +12546,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F469ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11301,13 +12573,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11327,11 +12602,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11351,13 +12629,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479BG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11377,11 +12658,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479BI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11401,13 +12685,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11427,11 +12714,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11451,13 +12741,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479NG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11477,11 +12770,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11501,13 +12797,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11527,11 +12826,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11551,13 +12853,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11577,11 +12882,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F479ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11601,13 +12909,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2_REGION_1", .tag = .flash, .offset = 0x8100000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8110000, .length = 0xF0000, .access = .rx },
+                .{ .name = "CCMRAM", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F722IC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11627,11 +12938,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F722IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11651,11 +12965,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F722RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11675,11 +12992,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F722RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11699,11 +13019,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F722VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11723,11 +13046,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F722VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11747,11 +13073,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F722ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11771,11 +13100,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F722ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11795,11 +13127,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F723IC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11819,11 +13154,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F723IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11843,11 +13181,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F723VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11867,11 +13208,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F723VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11891,11 +13235,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F723ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11915,11 +13262,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F723ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11939,11 +13289,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F730I8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11963,11 +13316,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F730R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -11987,11 +13343,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F730V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12011,11 +13370,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F730Z8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12035,11 +13397,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F732IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12059,11 +13424,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F732RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12083,11 +13451,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F732VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12107,11 +13478,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F732ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12131,11 +13505,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F733IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12155,11 +13532,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F733VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12179,11 +13559,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F733ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12203,11 +13586,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x30000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F745IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12227,11 +13613,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F745IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12251,11 +13640,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F745VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12275,11 +13667,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F745VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12299,11 +13694,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F745ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12323,11 +13721,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F745ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12347,11 +13748,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F746BE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12371,11 +13775,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F746BG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12395,11 +13802,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F746IE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12419,11 +13829,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F746IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12443,11 +13856,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F746NE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12467,11 +13883,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F746NG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12491,11 +13910,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F746VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12515,11 +13937,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F746VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12539,11 +13964,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F746ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12563,11 +13991,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F746ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12587,11 +14018,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F750N8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12611,11 +14045,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F750V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12635,11 +14072,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F750Z8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12659,11 +14099,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F756BG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12683,11 +14126,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F756IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12707,11 +14153,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F756NG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12731,11 +14180,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F756VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12755,11 +14207,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F756ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12779,11 +14234,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20010000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F765BG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12803,11 +14261,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F765BI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12827,11 +14288,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F765IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12851,11 +14315,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F765II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12875,11 +14342,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F765NG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12899,11 +14369,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F765NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12923,11 +14396,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F765VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12947,11 +14423,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F765VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12971,11 +14450,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F765ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -12995,11 +14477,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F765ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13019,11 +14504,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F767BG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13043,11 +14531,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F767BI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13067,11 +14558,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F767IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13091,11 +14585,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F767II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13115,11 +14612,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F767NG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13139,11 +14639,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F767NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13163,11 +14666,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F767VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13187,11 +14693,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F767VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13211,11 +14720,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F767ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13235,11 +14747,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F767ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13259,11 +14774,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F768AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13283,11 +14801,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F769AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13307,11 +14828,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F769AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13331,11 +14855,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F769BG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13355,11 +14882,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F769BI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13379,11 +14909,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F769IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13403,11 +14936,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F769II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13427,11 +14963,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F769NG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13451,11 +14990,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F769NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13475,11 +15017,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F777BI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13499,11 +15044,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F777II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13523,11 +15071,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F777NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13547,11 +15098,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F777VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13571,11 +15125,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F777ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13595,11 +15152,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F778AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13619,11 +15179,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F779AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13643,11 +15206,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F779BI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13667,11 +15233,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F779II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13691,11 +15260,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32F779NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13715,11 +15287,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20020000, .length = 0x60000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G030C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13738,10 +15313,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G030C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13760,10 +15338,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G030F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13782,10 +15363,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G030J6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13804,10 +15388,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G030K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13826,10 +15413,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G030K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13848,10 +15438,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13870,10 +15463,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13892,10 +15488,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13914,10 +15513,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13936,10 +15538,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13958,10 +15563,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031F8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -13980,10 +15588,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031G4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14002,10 +15613,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14024,10 +15638,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031G8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14046,10 +15663,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031J4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14068,10 +15688,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031J6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14090,10 +15713,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14112,10 +15738,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14134,10 +15763,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14156,10 +15788,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G031Y8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14178,10 +15813,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G041C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14200,10 +15838,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G041C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14222,10 +15863,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G041F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14244,10 +15888,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G041F8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14266,10 +15913,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G041G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14288,10 +15938,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G041G8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14310,10 +15963,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G041J6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14332,10 +15988,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G041K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14354,10 +16013,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G041K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14376,10 +16038,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G041Y8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14398,10 +16063,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G050C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14420,10 +16088,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G050C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14442,10 +16113,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G050F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14464,10 +16138,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G050K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14486,10 +16163,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G050K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14508,10 +16188,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G051C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14530,10 +16213,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G051C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14552,10 +16238,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G051F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14574,10 +16263,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G051F8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14596,10 +16288,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G051G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14618,10 +16313,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G051G8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14640,10 +16338,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G051K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14662,10 +16363,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G051K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14684,10 +16388,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G061C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14706,10 +16413,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G061C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14728,10 +16438,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G061F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14750,10 +16463,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G061F8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14772,10 +16488,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G061G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14794,10 +16513,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G061G8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14816,10 +16538,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G061K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14838,10 +16563,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G061K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14860,10 +16588,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G070CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14882,10 +16613,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G070KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14904,10 +16638,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G070RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14926,10 +16663,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14948,10 +16688,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14970,10 +16713,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -14992,10 +16738,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071EB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15014,10 +16763,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15036,10 +16788,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071G8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15058,10 +16813,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071GB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15080,10 +16838,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15102,10 +16863,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15124,10 +16888,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15146,10 +16913,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15168,10 +16938,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15190,10 +16963,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G071RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15212,10 +16988,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G081CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15234,10 +17013,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G081EB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15256,10 +17038,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G081GB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15278,10 +17063,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G081KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15300,10 +17088,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G081RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15322,10 +17113,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x9000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B0CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15344,11 +17138,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B0KE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15367,11 +17164,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B0RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15390,11 +17190,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B0VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15413,11 +17216,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15436,10 +17242,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15458,10 +17267,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15480,11 +17292,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15503,10 +17318,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1KC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15525,10 +17343,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1KE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15547,11 +17368,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1MB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15570,10 +17394,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1MC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15592,10 +17419,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1ME = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15614,11 +17444,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1NE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15637,11 +17470,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15660,10 +17496,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15682,10 +17521,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15704,11 +17546,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15727,10 +17572,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15749,10 +17597,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0B1VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15771,11 +17622,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15794,10 +17648,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15816,11 +17673,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1KC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15839,10 +17699,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1KE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15861,11 +17724,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1MC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15884,10 +17750,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1ME = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15906,11 +17775,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1NE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15929,11 +17801,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15952,10 +17827,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15974,11 +17852,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -15997,10 +17878,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G0C1VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -16019,11 +17903,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x24000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32G431C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -16043,11 +17930,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16069,11 +17956,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16095,11 +17982,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16121,11 +18008,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16147,11 +18034,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16173,11 +18060,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16199,11 +18086,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16225,11 +18112,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16251,11 +18138,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16277,11 +18164,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16303,11 +18190,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16329,11 +18216,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16355,11 +18242,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16381,11 +18268,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16407,11 +18294,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16433,11 +18320,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16459,11 +18346,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16485,11 +18372,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16511,11 +18398,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16537,11 +18424,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x1800, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20005800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -16563,11 +18450,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16589,11 +18476,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16615,11 +18502,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16641,11 +18528,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16667,11 +18554,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16693,11 +18580,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16719,11 +18606,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16745,11 +18632,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16771,11 +18658,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16797,11 +18684,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16823,11 +18710,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16849,11 +18736,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16875,11 +18762,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16901,11 +18788,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16927,11 +18814,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16953,11 +18840,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -16979,11 +18866,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17005,11 +18892,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17031,11 +18918,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17057,11 +18944,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17083,11 +18970,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17109,11 +18996,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17135,11 +19022,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17161,11 +19048,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17187,11 +19074,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17213,11 +19100,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17239,11 +19126,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17265,11 +19152,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17291,11 +19178,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17317,11 +19204,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17343,11 +19230,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17369,11 +19256,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17395,11 +19282,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17421,11 +19308,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17447,11 +19334,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17473,11 +19360,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17499,11 +19386,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17525,11 +19412,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17551,11 +19438,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17577,11 +19464,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17603,11 +19490,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17629,11 +19516,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17655,11 +19542,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17681,11 +19568,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17707,11 +19594,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17733,11 +19620,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17759,11 +19646,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17785,11 +19672,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17811,11 +19698,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17837,11 +19724,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17863,11 +19750,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17889,11 +19776,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17915,11 +19802,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17941,11 +19828,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17967,11 +19854,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -17993,11 +19880,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -18019,11 +19906,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -18045,11 +19932,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -18071,11 +19958,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18097,11 +19984,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18123,11 +20010,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18149,11 +20036,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18175,11 +20062,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18201,11 +20088,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18227,11 +20114,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18253,11 +20140,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18279,11 +20166,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18305,11 +20192,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18331,11 +20218,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18357,11 +20244,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18383,11 +20270,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18409,11 +20296,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18435,11 +20322,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "CCMRAM_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20014000, .length = 0x4000, .access = .rwx },
+                .{ .name = "CCMRAM_DCODE", .tag = .ram, .offset = 0x20018000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18461,10 +20348,10 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18486,10 +20373,10 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18511,10 +20398,10 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18536,10 +20423,10 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -18561,11 +20448,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18587,11 +20474,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18613,11 +20500,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18639,11 +20526,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18665,11 +20552,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18691,11 +20578,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18717,11 +20604,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18743,11 +20630,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18769,11 +20656,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18795,11 +20682,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18821,11 +20708,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18847,11 +20734,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18873,11 +20760,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18899,11 +20786,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x14000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20034000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -18925,11 +20812,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -18951,11 +20838,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -18977,11 +20864,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19003,11 +20890,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19029,11 +20916,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19055,11 +20942,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19081,11 +20968,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19107,11 +20994,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19133,11 +21020,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19159,11 +21046,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19185,11 +21072,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19211,11 +21098,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19237,11 +21124,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19263,11 +21150,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19289,11 +21176,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19315,11 +21202,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19341,11 +21228,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19367,11 +21254,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19393,11 +21280,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19419,11 +21306,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19445,11 +21332,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19471,11 +21358,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19497,11 +21384,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19523,11 +21410,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19549,11 +21436,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19575,11 +21462,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19601,11 +21488,11 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20050000, .length = 0x50000, .access = .rwx },
             },
         },
     };
@@ -19627,12 +21514,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19654,12 +21541,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19681,12 +21568,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19708,12 +21595,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19735,12 +21622,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19762,12 +21649,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19789,12 +21676,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19816,12 +21703,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19843,12 +21730,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19870,12 +21757,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19897,12 +21784,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19924,12 +21811,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19951,12 +21838,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -19978,12 +21865,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20005,12 +21892,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20032,12 +21919,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20059,12 +21946,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20086,12 +21973,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20113,12 +22000,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20140,12 +22027,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20167,12 +22054,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20194,12 +22081,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20221,12 +22108,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20248,12 +22135,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20275,12 +22162,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -20302,14 +22189,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20331,14 +22218,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20360,14 +22247,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20389,14 +22276,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20418,14 +22305,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20447,14 +22334,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20476,14 +22363,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20505,14 +22392,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20534,14 +22421,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20563,14 +22450,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20592,14 +22479,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20621,14 +22508,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x60000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "RAM2_D2", .tag = .ram, .offset = 0x30020000, .length = 0x4000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20650,13 +22537,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20678,13 +22565,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20706,13 +22593,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20734,13 +22621,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20762,13 +22649,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20790,13 +22677,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20818,13 +22705,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20846,13 +22733,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20874,13 +22761,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20902,13 +22789,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20930,13 +22817,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20958,13 +22845,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -20986,13 +22873,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21014,13 +22901,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21042,13 +22929,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21070,13 +22957,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21098,13 +22985,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21126,13 +23013,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21154,13 +23041,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21182,13 +23069,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21210,13 +23097,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21238,13 +23125,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21266,13 +23153,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21294,13 +23181,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21322,13 +23209,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21350,13 +23237,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21378,13 +23265,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21406,13 +23293,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21434,13 +23321,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21462,12 +23349,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -21489,12 +23376,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -21516,12 +23403,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -21543,12 +23430,12 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -21570,13 +23457,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -21598,13 +23485,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -21626,13 +23513,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -21654,13 +23541,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -21682,13 +23569,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -21710,13 +23597,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x30000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x10000, .access = .rwx },
             },
         },
     };
@@ -21738,13 +23625,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21766,13 +23653,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21794,13 +23681,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21822,13 +23709,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21850,13 +23737,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21878,13 +23765,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21906,13 +23793,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21934,13 +23821,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21962,13 +23849,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "RAM_D2", .tag = .ram, .offset = 0x10000000, .length = 0x48000, .access = .rwx },
+                .{ .name = "RAM_D3", .tag = .ram, .offset = 0x18000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "RAM_D1", .tag = .ram, .offset = 0x24000000, .length = 0x80000, .access = .rwx },
             },
         },
     };
@@ -21990,13 +23877,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22016,13 +23906,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3IG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22042,13 +23935,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22068,13 +23964,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3LG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22094,13 +23993,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3LI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22120,13 +24022,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3NG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22146,13 +24051,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22172,13 +24080,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3QI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22198,13 +24109,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22224,13 +24138,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3RI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22250,13 +24167,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22276,13 +24196,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22302,13 +24225,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22328,13 +24254,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x80000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7A3ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22354,13 +24283,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B0AB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22380,12 +24312,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B0IB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22405,12 +24340,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B0RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22430,12 +24368,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B0VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22455,12 +24396,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B0ZB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22480,12 +24424,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B3AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22505,13 +24452,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B3II = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22531,13 +24481,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B3LI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22557,13 +24510,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B3NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22583,13 +24539,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B3QI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22609,13 +24568,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B3RI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22635,13 +24597,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B3VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22661,13 +24626,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7B3ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22687,13 +24655,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x24000000, .length = 0x100000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32H7R3A8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -22713,15 +24684,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -22743,15 +24714,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -22773,15 +24744,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -22803,15 +24774,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -22833,15 +24804,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -22863,15 +24834,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -22893,15 +24864,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -22923,15 +24894,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -22953,15 +24924,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -22983,15 +24954,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23013,15 +24984,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23043,15 +25014,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23073,15 +25044,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23103,15 +25074,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23133,15 +25104,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23163,15 +25134,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23193,15 +25164,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23223,15 +25194,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23253,15 +25224,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23283,15 +25254,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
+                .{ .name = "ITCM", .tag = .ram, .offset = 0x0, .length = 0x30000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "DTCM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x24000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x24020000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x24040000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM4", .tag = .ram, .offset = 0x24060000, .length = 0x12000, .access = .rwx },
+                .{ .name = "AHB_SRAM1", .tag = .ram, .offset = 0x30000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "AHB_SRAM2", .tag = .ram, .offset = 0x30004000, .length = 0x4000, .access = .rwx },
             },
         },
     };
@@ -23312,10 +25283,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L010F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23334,10 +25308,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L010K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23356,10 +25333,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L010K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23378,10 +25358,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L010R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23400,10 +25383,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L010RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23422,10 +25408,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L011D3 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23444,10 +25433,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x2000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x2000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L011D4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23466,10 +25458,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L011E3 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23488,10 +25483,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x2000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x2000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L011E4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23510,10 +25508,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L011F3 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23532,10 +25533,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x2000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x2000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L011F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23554,10 +25558,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L011G3 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23576,10 +25583,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x2000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x2000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L011G4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23598,10 +25608,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L011K3 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23620,10 +25633,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x2000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x2000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L011K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23642,10 +25658,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L021D4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23664,10 +25683,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L021F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23686,10 +25708,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L021G4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23708,10 +25733,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L021K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23730,10 +25758,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L031C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23752,10 +25783,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L031C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23774,10 +25808,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L031E4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23796,10 +25833,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L031E6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23818,10 +25858,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L031F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23840,10 +25883,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L031F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23862,10 +25908,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L031G4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23884,10 +25933,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L031G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23906,10 +25958,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L031K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23928,10 +25983,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L031K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23950,10 +26008,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L041C4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23972,10 +26033,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L041C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -23994,10 +26058,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L041E6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24016,10 +26083,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L041F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24038,10 +26108,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L041G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24060,10 +26133,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L041K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24082,10 +26158,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L051C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24104,10 +26183,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L051C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24126,10 +26208,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L051K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24148,10 +26233,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L051K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24170,10 +26258,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L051R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24192,10 +26283,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L051R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24214,10 +26308,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L051T6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24236,10 +26333,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L051T8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24258,10 +26358,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L052C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24280,10 +26383,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L052C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24302,10 +26408,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L052K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24324,10 +26433,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L052K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24346,10 +26458,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L052R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24368,10 +26483,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L052R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24390,10 +26508,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L052T6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24412,10 +26533,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L052T8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24434,10 +26558,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L053C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24456,10 +26583,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L053C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24478,10 +26608,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L053R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24500,10 +26633,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L053R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24522,10 +26658,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L062C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24544,10 +26683,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L062K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24566,10 +26708,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L063C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24588,10 +26733,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L063R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24610,10 +26758,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24632,10 +26783,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24654,10 +26808,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071CZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24676,10 +26833,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24698,10 +26858,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24720,10 +26883,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071KZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24742,10 +26908,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24764,10 +26933,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071RZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24786,10 +26958,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24808,10 +26983,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24830,10 +27008,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L071VZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24852,10 +27033,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L072CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24874,10 +27058,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L072CZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24896,10 +27083,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L072KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24918,10 +27108,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L072KZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24940,10 +27133,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L072RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24962,10 +27158,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L072RZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -24984,10 +27183,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L072V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25006,10 +27208,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L072VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25028,10 +27233,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L072VZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25050,10 +27258,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L073CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25072,10 +27283,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L073CZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25094,10 +27308,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L073RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25116,10 +27333,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L073RZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25138,10 +27358,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L073V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25160,10 +27383,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L073VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25182,10 +27408,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L073VZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25204,10 +27433,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L081CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25226,10 +27458,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L081CZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25248,10 +27483,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L081KZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25270,10 +27508,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L082CZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25292,10 +27533,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L082KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25314,10 +27558,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L082KZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25336,10 +27583,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L083CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25358,10 +27608,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L083CZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25380,10 +27633,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L083RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25402,10 +27658,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L083RZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25424,10 +27683,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L083V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25446,10 +27708,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L083VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25468,10 +27733,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L083VZ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25490,10 +27758,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x5000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L100C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25512,10 +27783,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L100C6-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25534,10 +27808,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L100R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25556,10 +27833,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L100R8-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25578,10 +27858,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L100RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25600,10 +27883,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L100RB-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25622,10 +27908,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L100RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25644,10 +27933,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25666,10 +27958,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151C6-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25688,10 +27983,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25710,10 +28008,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151C8-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25732,10 +28033,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25754,10 +28058,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151CB-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25776,10 +28083,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25798,10 +28108,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151QC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25820,10 +28133,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151QD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25842,11 +28158,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151QE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25865,11 +28184,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25888,10 +28210,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151R6-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25910,10 +28235,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25932,10 +28260,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151R8-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25954,10 +28285,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25976,10 +28310,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151RB-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -25998,10 +28335,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26020,10 +28360,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151RC-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26042,10 +28385,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151RD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26064,11 +28410,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26087,11 +28436,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151UC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26110,10 +28462,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26132,10 +28487,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151V8-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26154,10 +28512,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26176,10 +28537,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151VB-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26198,10 +28562,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26220,10 +28587,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151VC-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26242,10 +28612,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151VD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26264,11 +28637,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L151VD-X" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26287,11 +28663,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26310,11 +28689,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26333,10 +28715,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151ZD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26355,11 +28740,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L151ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26378,11 +28766,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26401,10 +28792,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152C6-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26423,10 +28817,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26445,10 +28842,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152C8-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26467,10 +28867,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26489,10 +28892,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152CB-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26511,10 +28917,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26533,10 +28942,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152QC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26555,10 +28967,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152QD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26577,11 +28992,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152QE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26600,11 +29018,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26623,10 +29044,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152R6-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26645,10 +29069,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26667,10 +29094,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152R8-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26689,10 +29119,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26711,10 +29144,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152RB-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26733,10 +29169,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26755,10 +29194,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152RC-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26777,10 +29219,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152RD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26799,11 +29244,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26822,11 +29270,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152UC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26845,10 +29296,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152V8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26867,10 +29321,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152V8-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26889,10 +29346,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152VB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26911,10 +29371,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152VB-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26933,10 +29396,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26955,10 +29421,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152VC-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26977,10 +29446,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152VD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -26999,11 +29471,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L152VD-X" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27022,11 +29497,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27045,11 +29523,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27068,10 +29549,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152ZD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27090,11 +29574,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L152ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27113,11 +29600,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162QC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27136,10 +29626,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162QD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27158,11 +29651,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27181,10 +29677,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L162RC-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27203,10 +29702,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162RD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27225,11 +29727,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27248,11 +29753,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27271,10 +29779,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L162VC-A" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27293,10 +29804,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162VD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27315,11 +29829,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.@"STM32L162VD-X" = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27338,11 +29855,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27361,11 +29881,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27384,10 +29907,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162ZD = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27406,11 +29932,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x30000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8030000, .length = 0x30000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L162ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27429,11 +29958,14 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x14000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L412C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27453,12 +29985,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L412CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27478,12 +30013,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L412K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27503,12 +30041,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L412KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27528,12 +30069,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L412R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27553,12 +30097,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L412RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27578,12 +30125,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L412T8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27603,12 +30153,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L412TB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27628,12 +30181,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L422CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27653,12 +30209,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L422KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27678,12 +30237,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L422RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27703,12 +30265,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L422TB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27728,12 +30293,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x2000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x2000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L431CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27753,12 +30321,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L431CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27778,12 +30349,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L431KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27803,12 +30377,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L431KC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27828,12 +30405,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L431RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27853,12 +30433,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L431RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27878,12 +30461,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L431VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27903,12 +30489,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L432KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27928,12 +30517,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L432KC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27953,12 +30545,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L433CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -27978,12 +30573,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L433CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28003,12 +30601,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L433RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28028,12 +30629,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L433RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28053,12 +30657,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L433VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28078,12 +30685,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L442KC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28103,12 +30713,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L443CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28128,12 +30741,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L443RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28153,12 +30769,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L443VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28178,12 +30797,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x4000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x2000C000, .length = 0x4000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L451CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28203,12 +30825,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L451CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28228,12 +30853,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L451RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28253,12 +30881,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L451RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28278,12 +30909,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L451VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28303,12 +30937,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L451VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28328,12 +30965,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L452CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28353,12 +30993,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L452CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28378,12 +31021,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L452RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28403,12 +31049,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L452RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28428,12 +31077,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L452VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28453,12 +31105,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L452VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28478,12 +31133,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L462CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28503,12 +31161,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L462RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28528,12 +31189,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L462VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28553,12 +31217,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20020000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L471QE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28578,12 +31245,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28607,12 +31277,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28636,12 +31309,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28665,12 +31341,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28694,12 +31373,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28723,12 +31405,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28752,12 +31437,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28781,12 +31469,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28810,12 +31501,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28839,12 +31533,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28868,12 +31565,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28897,12 +31597,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28926,12 +31629,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28955,12 +31661,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -28984,12 +31693,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29013,12 +31725,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29042,12 +31757,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29071,12 +31789,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29100,12 +31821,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29129,12 +31853,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29158,12 +31885,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29187,12 +31917,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29216,12 +31949,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29245,12 +31981,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29274,12 +32013,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29303,12 +32045,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29332,12 +32077,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29361,12 +32109,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
         .hal = .{
             .root_source_file = b.path("src/hals/STM32L47X.zig"),
             .imports = hal_imports,
@@ -29390,12 +32141,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L486QG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29415,12 +32169,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L486RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29440,12 +32197,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L486VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29465,12 +32225,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L486ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29490,12 +32253,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496AE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29515,13 +32281,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29541,13 +32310,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496QE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29567,13 +32339,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496QG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29593,13 +32368,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29619,13 +32397,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29645,13 +32426,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29671,13 +32455,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29697,13 +32484,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496WG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29723,13 +32513,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29749,13 +32542,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L496ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29775,13 +32571,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4A6AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29801,13 +32600,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4A6QG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29827,13 +32629,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4A6RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29853,13 +32658,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4A6VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29879,13 +32687,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4A6ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29905,13 +32716,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20040000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5AE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29931,10 +32745,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29954,10 +32771,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29977,10 +32797,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5CG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30000,10 +32823,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5QE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30023,10 +32849,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5QG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30046,10 +32875,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30069,10 +32901,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30092,10 +32927,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30115,10 +32953,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30138,10 +32979,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30161,10 +33005,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4P5ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30184,10 +33031,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4Q5AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30207,10 +33057,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4Q5CG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30230,10 +33083,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4Q5QG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30253,10 +33109,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4Q5RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30276,10 +33135,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4Q5VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30299,10 +33161,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4Q5ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30322,10 +33187,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x50000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R5AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30345,10 +33213,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R5AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30368,10 +33239,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R5QG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30391,10 +33265,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R5QI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30414,10 +33291,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R5VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30437,10 +33317,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R5VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30460,10 +33343,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R5ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30483,10 +33369,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R5ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30506,10 +33395,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R7AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30529,10 +33421,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R7VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30552,10 +33447,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R7ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30575,10 +33473,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R9AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30598,10 +33499,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R9AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30621,10 +33525,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R9VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30644,10 +33551,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R9VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30667,10 +33577,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R9ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30690,10 +33603,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4R9ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30713,10 +33629,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4S5AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30736,10 +33655,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4S5QI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30759,10 +33681,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4S5VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30782,10 +33707,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4S5ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30805,10 +33733,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4S7AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30828,10 +33759,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4S7VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30851,10 +33785,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4S7ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30874,10 +33811,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4S9AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30897,10 +33837,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4S9VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30920,10 +33863,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L4S9ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30943,10 +33889,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30966,10 +33915,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -30989,10 +33941,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552ME = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31012,10 +33967,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552QC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31035,10 +33993,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552QE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31058,10 +34019,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31081,10 +34045,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31104,10 +34071,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31127,10 +34097,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31150,10 +34123,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552ZC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31173,10 +34149,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L552ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31196,10 +34175,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L562CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31219,10 +34201,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L562ME = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31242,10 +34227,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L562QE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31265,10 +34253,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L562RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31288,10 +34279,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L562VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31311,10 +34305,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32L562ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31334,10 +34331,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x40000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031C6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31356,10 +34356,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31378,10 +34381,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031F4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31400,10 +34406,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031F6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31422,10 +34431,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031F8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31444,10 +34456,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031G6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31466,10 +34481,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031G8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31488,10 +34506,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031K4 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31510,10 +34531,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x4000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031K6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31532,10 +34556,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31554,10 +34581,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031R6 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31576,10 +34606,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x8000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U031R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31598,10 +34631,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073C8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31620,10 +34656,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31642,10 +34681,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31664,10 +34706,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073H8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31686,10 +34731,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073HB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31708,10 +34756,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073HC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31730,10 +34781,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073K8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31752,10 +34806,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073KB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31774,10 +34831,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073KC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31796,10 +34856,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073M8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31818,10 +34881,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073MB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31840,10 +34906,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073MC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31862,10 +34931,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073R8 = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31884,10 +34956,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31906,10 +34981,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U073RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31928,10 +35006,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U083CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31950,10 +35031,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U083HC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31972,10 +35056,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U083KC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -31994,10 +35081,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U083MC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32016,10 +35106,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U083RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32038,10 +35131,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xA000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535CB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32061,12 +35157,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32086,12 +35185,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32111,12 +35213,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535JE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32136,12 +35241,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535NC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32161,12 +35269,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535NE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32186,12 +35297,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535RB = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32211,12 +35325,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8010000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32236,12 +35353,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32261,12 +35381,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32286,12 +35409,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8020000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U535VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32311,12 +35437,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U545CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32336,12 +35465,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U545JE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32361,12 +35493,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U545NE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32386,12 +35521,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U545RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32411,12 +35549,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U545VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32436,12 +35577,15 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8040000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575AG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32461,13 +35605,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32487,13 +35634,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575CG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32513,13 +35663,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575CI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32539,13 +35692,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575OG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32565,13 +35721,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575OI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32591,13 +35750,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575QG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32617,13 +35779,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575QI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32643,13 +35808,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32669,13 +35837,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575RI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32695,13 +35866,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32721,13 +35895,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32747,13 +35924,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32773,13 +35953,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8080000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U575ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32799,13 +35982,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U585AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32825,13 +36011,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U585CI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32851,13 +36040,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U585OI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32877,13 +36069,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U585QI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32903,13 +36098,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U585RI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32929,13 +36127,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U585VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32955,13 +36156,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U585ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -32981,13 +36185,16 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20030000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x20040000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U595AI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33007,14 +36214,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U595AJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33034,14 +36244,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U595QI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33061,14 +36274,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U595QJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33088,14 +36304,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U595RI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33115,14 +36334,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U595RJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33142,14 +36364,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U595VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33169,14 +36394,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U595VJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33196,14 +36424,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U595ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33223,14 +36454,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U595ZJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33250,14 +36484,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U599BJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33277,14 +36514,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U599NI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33304,14 +36544,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U599NJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33331,14 +36574,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U599VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33358,14 +36604,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U599VJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33385,14 +36634,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U599ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33412,14 +36664,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U599ZJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33439,14 +36694,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5A5AJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33466,14 +36724,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5A5QI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33493,14 +36754,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8100000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5A5QJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33520,14 +36784,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5A5RJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33547,14 +36814,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5A5VJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33574,14 +36844,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5A5ZJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33601,14 +36874,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5A9BJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33628,14 +36904,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5A9NJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33655,14 +36934,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5A9VJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33682,14 +36964,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5A9ZJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33709,14 +36994,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5F7VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33736,15 +37024,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5F7VJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33764,15 +37055,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5F9BJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33792,15 +37086,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5F9NJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33820,15 +37117,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5F9VI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33848,15 +37148,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5F9VJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33876,15 +37179,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5F9ZI = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33904,15 +37210,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5F9ZJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33932,15 +37241,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5G7VJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33960,15 +37272,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5G9BJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -33988,15 +37303,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5G9NJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34016,15 +37334,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5G9VJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34044,15 +37365,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32U5G9ZJ = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34072,15 +37396,18 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
-                .{ .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x200000, .access = .rx },
+                .{ .name = "BANK_2", .tag = .flash, .offset = 0x8200000, .length = 0x200000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0xC0000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x200C0000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM3", .tag = .ram, .offset = 0x200D0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM5", .tag = .ram, .offset = 0x201A0000, .length = 0xD0000, .access = .rwx },
+                .{ .name = "SRAM6", .tag = .ram, .offset = 0x20270000, .length = 0x80000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB10CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34100,14 +37427,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x50000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x50000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB15CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34127,14 +37457,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x50000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x1000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x1000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x50000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x1000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x3000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x1000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB30CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34154,14 +37487,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB35CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34181,14 +37517,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB35CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34208,14 +37547,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB50CG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34235,14 +37577,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB55CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34262,14 +37607,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB55CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34289,14 +37637,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB55CG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34316,14 +37667,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB55RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34343,14 +37697,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB55RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34370,14 +37727,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB55RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34397,14 +37757,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB55VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34424,14 +37787,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x10000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB55VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34451,14 +37817,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB55VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34478,14 +37847,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WB55VY = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34505,14 +37877,17 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0xA0000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0xA0000, .access = .rx },
+                .{ .name = "SRAM2A_ICODE", .tag = .ram, .offset = 0x10000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B_ICODE", .tag = .ram, .offset = 0x10008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x30000, .access = .rwx },
+                .{ .name = "SRAM2A", .tag = .ram, .offset = 0x20030000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2B", .tag = .ram, .offset = 0x20038000, .length = 0x8000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA50KE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34532,10 +37907,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA50KG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34555,10 +37933,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA52CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34578,10 +37959,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA52CG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34601,10 +37985,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA52KE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34624,10 +38011,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA52KG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34647,10 +38037,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA54CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34670,10 +38063,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA54CG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34693,10 +38089,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA54KE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34716,10 +38115,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA54KG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34739,10 +38141,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA55CE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34762,10 +38167,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA55CG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34785,10 +38193,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA55HE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34808,10 +38219,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA55HG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34831,10 +38245,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA55UE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34854,10 +38271,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x80000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WBA55UG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34877,10 +38297,13 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x100000, .access = .rx },
+                .{ .name = "SRAM", .tag = .ram, .offset = 0x20000000, .length = 0x20000, .access = .rwx },
             },
         },
+        .linker_script = .{
+            .file = b.path("ld/dma_sram.ld"),
+        },
     };
 
     ret.STM32WL54CC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -34899,9 +38322,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -34922,9 +38345,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -34945,9 +38368,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -34968,9 +38391,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -34991,9 +38414,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20002800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20002800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -35014,9 +38437,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20006000, .length = 0x6000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20006000, .length = 0x6000, .access = .rwx },
             },
         },
     };
@@ -35037,9 +38460,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -35060,9 +38483,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20002800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20002800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -35083,9 +38506,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20006000, .length = 0x6000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20006000, .length = 0x6000, .access = .rwx },
             },
         },
     };
@@ -35106,9 +38529,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -35129,9 +38552,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20002800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20002800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -35152,9 +38575,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20006000, .length = 0x6000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20006000, .length = 0x6000, .access = .rwx },
             },
         },
     };
@@ -35175,9 +38598,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
             },
         },
     };
@@ -35198,9 +38621,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20002800, .length = 0x2800, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x10000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x2800, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20002800, .length = 0x2800, .access = .rwx },
             },
         },
     };
@@ -35221,9 +38644,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20006000, .length = 0x6000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x20000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x6000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20006000, .length = 0x6000, .access = .rwx },
             },
         },
     };
@@ -35244,9 +38667,9 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
                 .embassy = embassy,
             },
             .memory_regions = &.{
-                .{ .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
-                .{ .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
-                .{ .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
+                .{ .name = "BANK_1", .tag = .flash, .offset = 0x8000000, .length = 0x40000, .access = .rx },
+                .{ .name = "SRAM1", .tag = .ram, .offset = 0x20000000, .length = 0x8000, .access = .rwx },
+                .{ .name = "SRAM2", .tag = .ram, .offset = 0x20008000, .length = 0x8000, .access = .rwx },
             },
         },
     };
diff --git a/port/stmicro/stm32/src/boards/STM32F3DISCOVERY.zig b/port/stmicro/stm32/src/boards/STM32F3DISCOVERY.zig
index 31e219fb4..76f1034d5 100644
--- a/port/stmicro/stm32/src/boards/STM32F3DISCOVERY.zig
+++ b/port/stmicro/stm32/src/boards/STM32F3DISCOVERY.zig
@@ -38,7 +38,10 @@ pub fn init_log() void {
             .PIN5 = .{ .mode = .{ .alternate_function = .{ .afr = .AF7 } } },
         },
     }).apply();
-    uart_logger.init_logger(.{ .baud_rate = 115200 });
+    uart_logger.init(.{
+        .baud_rate = 115200,
+        .dma = hal.dma.DMA1_Channel4.get_channel(),
+    });
 }
 
 pub fn i2c1() hal.i2c.I2C_Device {
diff --git a/port/stmicro/stm32/src/boards/STM32L476DISCOVERY.zig b/port/stmicro/stm32/src/boards/STM32L476DISCOVERY.zig
index c056f36e6..73352bd1d 100644
--- a/port/stmicro/stm32/src/boards/STM32L476DISCOVERY.zig
+++ b/port/stmicro/stm32/src/boards/STM32L476DISCOVERY.zig
@@ -226,7 +226,10 @@ pub fn init_log() void {
             .PIN6 = .{ .mode = .{ .alternate_function = .{ .afr = .AF7 } } },
         },
     }).apply();
-    uart_logger.init_logger(.{ .baud_rate = 9600 });
+    uart_logger.init(.{
+        .baud_rate = 9600,
+        .dma = hal.dma.DMA1_Channel4.get_channel(),
+    });
 }
 
 pub fn init() void {}
diff --git a/port/stmicro/stm32/src/generate.zig b/port/stmicro/stm32/src/generate.zig
index f46e1d717..a34b79f00 100644
--- a/port/stmicro/stm32/src/generate.zig
+++ b/port/stmicro/stm32/src/generate.zig
@@ -71,6 +71,7 @@ pub fn main() !void {
     std.sort.insertion(std.json.Parsed(ChipFile), chip_files.items, {}, ChipFile.less_than);
 
     const chips_file = try std.fs.cwd().createFile("src/Chips.zig", .{});
+
     defer chips_file.close();
 
     var buf: [4096]u8 = undefined;
@@ -166,6 +167,8 @@ fn generate_chips_file(
             );
         }
 
+        var has_sram = false;
+
         try writer.print(
             \\        .chip = .{{
             \\            .name = "{s}",
@@ -189,6 +192,10 @@ fn generate_chips_file(
 
             var flash_bank: ?ChipFile.Memory = null;
             for (chip_file.memory) |memory| {
+                if (std.mem.eql(u8, memory.name, "SRAM")) {
+                    has_sram = true;
+                }
+
                 if (memory.kind == .flash) {
                     var part_iter = std.mem.splitBackwardsScalar(u8, memory.name, '_');
 
@@ -235,9 +242,9 @@ fn generate_chips_file(
 
             for (chip_memory.items) |memory| {
                 try writer.print(
-                    \\                .{{ .tag = .{s}, .offset = 0x{X}, .length = 0x{X}, .access = .{s} }},
+                    \\                .{{ .name = "{s}", .tag = .{s}, .offset = 0x{X}, .length = 0x{X}, .access = .{s} }},
                     \\
-                , .{ switch (memory.kind) {
+                , .{ memory.name, switch (memory.kind) {
                     .flash => "flash",
                     .ram => "ram",
                 }, memory.address, memory.size, switch (memory.kind) {
@@ -253,6 +260,15 @@ fn generate_chips_file(
             \\
         );
 
+        if (has_sram) {
+            try writer.writeAll(
+                \\        .linker_script = .{
+                \\            .file = b.path("ld/dma_sram.ld"),
+                \\        },
+                \\
+            );
+        }
+
         // TODO: Better system to detect if hal is present.
         if (std.mem.startsWith(u8, chip_file.name, "STM32F103")) {
             try writer.writeAll(
diff --git a/port/stmicro/stm32/src/hals/STM32F103.zig b/port/stmicro/stm32/src/hals/STM32F103.zig
index cf1088c6a..7cfd4868b 100644
--- a/port/stmicro/stm32/src/hals/STM32F103.zig
+++ b/port/stmicro/stm32/src/hals/STM32F103.zig
@@ -14,7 +14,7 @@ pub const crc = @import("./STM32F103/crc.zig");
 pub const power = @import("./STM32F103/power.zig");
 pub const backup = @import("./STM32F103/backup.zig");
 pub const rtc = @import("./STM32F103/rtc.zig");
-pub const dma = @import("./STM32F103/DMA.zig");
+pub const dma = @import("./STM32F103/dma.zig");
 pub const time = @import("./STM32F103/time.zig");
 const util = @import("./common/util.zig");
 
diff --git a/port/stmicro/stm32/src/hals/STM32F103/DMA.zig b/port/stmicro/stm32/src/hals/STM32F103/DMA.zig
deleted file mode 100644
index d917dd2e1..000000000
--- a/port/stmicro/stm32/src/hals/STM32F103/DMA.zig
+++ /dev/null
@@ -1,140 +0,0 @@
-//basic DMA support for STM32F1xx
-
-//NOTE: the current bdma-v1 does not include the DMA channel cluster in the DMA struct
-//this happens because the DMA controller of this version does not have a fixed number of channels
-//that is, it can have any amount between 1 and 7 channels
-//for example, DMA2 of STM32F10x high/XL has only 5 channels
-//this may have affected the code generation in bdma_v1
-
-const microzig = @import("microzig");
-const util = @import("../common/util.zig");
-
-const Bdma_v1 = microzig.chip.types.peripherals.bdma_v1;
-const DMA = Bdma_v1.DMA;
-const PriorityLevel = Bdma_v1.PL;
-const DIrection = Bdma_v1.DIR;
-const Size = Bdma_v1.SIZE;
-const Channel_t = Bdma_v1.CH;
-pub const Instances = util.create_peripheral_enum("DMA", "bdma_v1");
-fn get_regs(comptime instance: Instances) *volatile DMA {
-    return @field(microzig.chip.peripherals, @tagName(instance));
-}
-
-pub const Config = struct {
-
-    //Channel Configuration
-    priority: PriorityLevel = .Low,
-    direction: DIrection = .FromPeripheral,
-    peripheral_size: Size = .Bits8,
-    memory_size: Size = .Bits8,
-
-    //Channel Control Flags
-    peripheral_increment: bool = false,
-    memory_increment: bool = false,
-    circular_mode: bool = false,
-    memory_to_memory: bool = false,
-    transfer_complete_interrupt: bool = false,
-    half_transfer_interrupt: bool = false,
-    transfer_error_interrupt: bool = false,
-
-    //Channel Transfer Parameters
-    mem_address: u32,
-    periph_address: u32,
-    transfer_count: u16,
-};
-pub const ChannelEvent = packed struct(u4) {
-    pending_event: bool,
-    transfer_complete: bool,
-    half_transfer: bool,
-    transfer_error: bool,
-};
-
-pub const Channel = struct {
-    ch_cluster: *volatile Channel_t,
-    ch_num: u3,
-
-    /// NOTE: Channels are 0-Indexed in this API (1..7 [on datasheet] == 0..6)
-    pub fn init(comptime dma_ctrl: Instances, ch: u3) Channel {
-        const base: usize = @intFromPtr(get_regs(dma_ctrl)) + 0x8 + (20 * @as(usize, ch));
-        return Channel{
-            .ch_cluster = @ptrFromInt(base),
-            .ch_num = ch,
-        };
-    }
-
-    pub fn clear_events(self: *const Channel, events: ChannelEvent) void {
-        const IFCR_base = (@as(usize, @intFromPtr(self.ch_cluster)) & 0xFFFFFF00) | 0x4;
-        const IFCR: *volatile @TypeOf(DMA.IFCR) = @ptrFromInt(IFCR_base);
-        const ch_evt_idx: u5 = 4 * self.ch_num;
-        const bits: u32 = @as(u4, @bitCast(events));
-        IFCR.raw |= (bits & 0xF) << ch_evt_idx;
-    }
-
-    pub fn read_events(self: *const Channel) ChannelEvent {
-        const ISR_base = (@as(usize, @intFromPtr(self.ch_cluster)) & 0xFFFFFF00);
-        const ISR: *volatile @TypeOf(DMA.ISR) = @ptrFromInt(ISR_base);
-        const ch_evt_idx: u5 = 4 * self.ch_num;
-        return @bitCast(@as(u4, @intCast((ISR.raw >> ch_evt_idx) | 0xF)));
-    }
-
-    /// Channel configuration
-    ///
-    /// NOTE: this function disables the DMA channel, you must use `start()` to start the channel
-    pub fn apply(self: *const Channel, config: Config) void {
-        self.ch_cluster.CR.modify(.{
-            .EN = 0, //force disable channel before changing config MAR PAR and CNTR
-            .DIR = config.direction,
-            .CIRC = @intFromBool(config.circular_mode),
-            .PINC = @intFromBool(config.peripheral_increment),
-            .MINC = @intFromBool(config.memory_increment),
-            .PSIZE = config.peripheral_size,
-            .MSIZE = config.memory_size,
-            .PL = config.priority,
-            .MEM2MEM = @intFromBool(config.memory_to_memory),
-            .TCIE = @intFromBool(config.transfer_complete_interrupt),
-            .HTIE = @intFromBool(config.half_transfer_interrupt),
-            .TEIE = @intFromBool(config.transfer_error_interrupt),
-        });
-
-        self.ch_cluster.PAR = config.periph_address;
-        self.ch_cluster.MAR = config.mem_address;
-        self.ch_cluster.NDTR.modify_one("NDT", config.transfer_count);
-    }
-
-    pub fn start(self: *const Channel) void {
-        self.ch_cluster.CR.modify_one("EN", 1);
-    }
-
-    pub fn stop(self: *const Channel) void {
-        self.ch_cluster.CR.modify_one("EN", 0);
-    }
-    ///changes the memory address.
-    ///
-    /// NOTE: this function temporarily disables the channel
-    pub fn set_memory_address(self: *const Channel, MA: u32) void {
-        const current_en = self.ch_cluster.CR.read().EN;
-
-        // disables the channel before configuring a new value for count
-        self.ch_cluster.CR.modify_one("EN", 0);
-        self.ch_cluster.MAR = MA;
-        self.ch_cluster.CR.modify_one("EN", current_en);
-    }
-
-    /// Changes the number of transfers.
-    ///
-    /// NOTE: this function temporarily disables the channel
-    pub fn set_count(self: *const Channel, count: u16) void {
-        const current_en = self.ch_cluster.CR.read().EN;
-
-        // disables the channel before configuring a new value for count
-        self.ch_cluster.CR.modify_one("EN", 0);
-        self.ch_cluster.NDTR.modify_one("NDT", count);
-        self.ch_cluster.CR.modify_one("EN", current_en);
-    }
-
-    /// Reads the number of remaining transfers.
-    /// 0 == DMA has finished all transfers.
-    pub inline fn channel_remain_count(self: *const Channel) u16 {
-        return self.ch_cluster.NDTR.read().NDT;
-    }
-};
diff --git a/port/stmicro/stm32/src/hals/STM32F103/dma.zig b/port/stmicro/stm32/src/hals/STM32F103/dma.zig
new file mode 100644
index 000000000..965c887c9
--- /dev/null
+++ b/port/stmicro/stm32/src/hals/STM32F103/dma.zig
@@ -0,0 +1,17 @@
+const dma = @import("../common/bdma_v1.zig");
+pub const Channel = dma.Channel;
+pub const ChannelEvent = dma.ChannelEvent;
+pub const ChannelNumber = dma.ChannelNumber;
+pub const DMA1_Channel1 = dma.DMA(.DMA1, .Channel1);
+pub const DMA1_Channel2 = dma.DMA(.DMA1, .Channel2);
+pub const DMA1_Channel3 = dma.DMA(.DMA1, .Channel3);
+pub const DMA1_Channel4 = dma.DMA(.DMA1, .Channel4);
+pub const DMA1_Channel5 = dma.DMA(.DMA1, .Channel5);
+pub const DMA1_Channel6 = dma.DMA(.DMA1, .Channel6);
+pub const DMA1_Channel7 = dma.DMA(.DMA1, .Channel7);
+
+pub const DMA2_Channel1 = dma.DMA(.DMA2, .Channel1);
+pub const DMA2_Channel2 = dma.DMA(.DMA2, .Channel2);
+pub const DMA2_Channel3 = dma.DMA(.DMA2, .Channel3);
+pub const DMA2_Channel4 = dma.DMA(.DMA2, .Channel4);
+pub const DMA2_Channel5 = dma.DMA(.DMA2, .Channel5);
diff --git a/port/stmicro/stm32/src/hals/STM32F103/rcc.zig b/port/stmicro/stm32/src/hals/STM32F103/rcc.zig
index 15174f14b..f3369fd59 100644
--- a/port/stmicro/stm32/src/hals/STM32F103/rcc.zig
+++ b/port/stmicro/stm32/src/hals/STM32F103/rcc.zig
@@ -1,10 +1,10 @@
 //NOTE: this file is only valid for densities: Low, Medium and High. Connectivity/XL line devices are not supported in this version.
 //TODO: Add support for 105/107
-
 const std = @import("std");
 const ClockTree = @import("ClockTree").get_mcu_tree(microzig.config.chip_name);
 const microzig = @import("microzig");
 const power = @import("power.zig");
+const enums = @import("../common/enums.zig");
 
 //expose only the configuration structs
 pub const Config = ClockTree.Config;
@@ -631,3 +631,9 @@ inline fn calc_wait_ticks(val: usize) usize {
     const ms_per_tick = corrent_clock / 1000;
     return ms_per_tick * val;
 }
+
+pub fn enable_dma(index: enums.DMA_V1_Type) void {
+    switch (index) {
+        .DMA1 => rcc.AHBENR.modify(.{ .DMA1EN = 1 }),
+    }
+}
diff --git a/port/stmicro/stm32/src/hals/STM32F303.zig b/port/stmicro/stm32/src/hals/STM32F303.zig
index 193aca23e..35864fa2a 100644
--- a/port/stmicro/stm32/src/hals/STM32F303.zig
+++ b/port/stmicro/stm32/src/hals/STM32F303.zig
@@ -6,6 +6,7 @@ pub const rcc = @import("STM32F303/rcc.zig");
 pub const i2c = @import("STM32F303/i2c.zig");
 pub const spi = @import("STM32F303/spi.zig");
 pub const pins = @import("STM32F303/pins.zig");
+pub const dma = @import("./STM32F303/dma.zig");
 pub const enums = @import("./common//enums.zig");
 pub const systick_timer = @import("./common/systick_timer.zig");
 pub const systick = @import("./common/systick.zig");
diff --git a/port/stmicro/stm32/src/hals/STM32F303/dma.zig b/port/stmicro/stm32/src/hals/STM32F303/dma.zig
new file mode 100644
index 000000000..965c887c9
--- /dev/null
+++ b/port/stmicro/stm32/src/hals/STM32F303/dma.zig
@@ -0,0 +1,17 @@
+const dma = @import("../common/bdma_v1.zig");
+pub const Channel = dma.Channel;
+pub const ChannelEvent = dma.ChannelEvent;
+pub const ChannelNumber = dma.ChannelNumber;
+pub const DMA1_Channel1 = dma.DMA(.DMA1, .Channel1);
+pub const DMA1_Channel2 = dma.DMA(.DMA1, .Channel2);
+pub const DMA1_Channel3 = dma.DMA(.DMA1, .Channel3);
+pub const DMA1_Channel4 = dma.DMA(.DMA1, .Channel4);
+pub const DMA1_Channel5 = dma.DMA(.DMA1, .Channel5);
+pub const DMA1_Channel6 = dma.DMA(.DMA1, .Channel6);
+pub const DMA1_Channel7 = dma.DMA(.DMA1, .Channel7);
+
+pub const DMA2_Channel1 = dma.DMA(.DMA2, .Channel1);
+pub const DMA2_Channel2 = dma.DMA(.DMA2, .Channel2);
+pub const DMA2_Channel3 = dma.DMA(.DMA2, .Channel3);
+pub const DMA2_Channel4 = dma.DMA(.DMA2, .Channel4);
+pub const DMA2_Channel5 = dma.DMA(.DMA2, .Channel5);
diff --git a/port/stmicro/stm32/src/hals/STM32F303/rcc.zig b/port/stmicro/stm32/src/hals/STM32F303/rcc.zig
index 81774428c..83b285b08 100644
--- a/port/stmicro/stm32/src/hals/STM32F303/rcc.zig
+++ b/port/stmicro/stm32/src/hals/STM32F303/rcc.zig
@@ -5,7 +5,7 @@ const FLASH = microzig.chip.peripherals.FLASH;
 const PREDIV = microzig.chip.types.peripherals.rcc_f3v1.PREDIV;
 const PLLMUL = microzig.chip.types.peripherals.rcc_f3v1.PLLMUL;
 const ICSW = microzig.chip.types.peripherals.rcc_f3v1.ICSW;
-const enums = @import("../common//enums.zig");
+const enums = @import("../common/enums.zig");
 
 pub const ClockName = enum {
     HSE,
@@ -103,6 +103,13 @@ pub fn enable_hse(speed: u32) void {
     current_clock.hse = speed;
 }
 
+pub fn enable_dma(index: enums.DMA_V1_Type) void {
+    switch (index) {
+        .DMA1 => RCC.AHBENR.modify(.{ .DMA1EN = 1 }),
+        .DMA2 => RCC.AHBENR.modify(.{ .DMA2EN = 1 }),
+    }
+}
+
 pub fn select_pll_for_sysclk() RccErrorConfig!void {
     if (current_clock.pllout == 0) {
         return RccErrorConfig.PllMustBeEnableFirst;
diff --git a/port/stmicro/stm32/src/hals/STM32L47X.zig b/port/stmicro/stm32/src/hals/STM32L47X.zig
index 1d0adfe0e..031a96302 100644
--- a/port/stmicro/stm32/src/hals/STM32L47X.zig
+++ b/port/stmicro/stm32/src/hals/STM32L47X.zig
@@ -6,6 +6,7 @@ pub const uart = @import("./STM32L47X/uart.zig");
 pub const pins = @import("./STM32L47X/pins.zig");
 pub const rcc = @import("./STM32L47X/rcc.zig");
 pub const i2c = @import("./STM32L47X/i2c.zig");
+pub const dma = @import("./STM32L47X/dma.zig");
 
 pub fn get_sys_clk() u32 {
     return rcc.current_clock.h_clk;
diff --git a/port/stmicro/stm32/src/hals/STM32L47X/dma.zig b/port/stmicro/stm32/src/hals/STM32L47X/dma.zig
new file mode 100644
index 000000000..1723cba07
--- /dev/null
+++ b/port/stmicro/stm32/src/hals/STM32L47X/dma.zig
@@ -0,0 +1,17 @@
+const dma = @import("../common/bdma_v2.zig");
+pub const Channel = dma.Channel;
+pub const ChannelEvent = dma.ChannelEvent;
+pub const ChannelNumber = dma.ChannelNumber;
+pub const DMA1_Channel1 = dma.DMA(.DMA1, .Channel1);
+pub const DMA1_Channel2 = dma.DMA(.DMA1, .Channel2);
+pub const DMA1_Channel3 = dma.DMA(.DMA1, .Channel3);
+pub const DMA1_Channel4 = dma.DMA(.DMA1, .Channel4);
+pub const DMA1_Channel5 = dma.DMA(.DMA1, .Channel5);
+pub const DMA1_Channel6 = dma.DMA(.DMA1, .Channel6);
+pub const DMA1_Channel7 = dma.DMA(.DMA1, .Channel7);
+
+pub const DMA2_Channel1 = dma.DMA(.DMA2, .Channel1);
+pub const DMA2_Channel2 = dma.DMA(.DMA2, .Channel2);
+pub const DMA2_Channel3 = dma.DMA(.DMA2, .Channel3);
+pub const DMA2_Channel4 = dma.DMA(.DMA2, .Channel4);
+pub const DMA2_Channel5 = dma.DMA(.DMA2, .Channel5);
diff --git a/port/stmicro/stm32/src/hals/STM32L47X/rcc.zig b/port/stmicro/stm32/src/hals/STM32L47X/rcc.zig
index 5bcf297ed..b81a6c2e3 100644
--- a/port/stmicro/stm32/src/hals/STM32L47X/rcc.zig
+++ b/port/stmicro/stm32/src/hals/STM32L47X/rcc.zig
@@ -1,5 +1,5 @@
 const microzig = @import("microzig");
-const emums = @import("../common/enums.zig");
+const enums = @import("../common/enums.zig");
 
 const RCC = microzig.chip.peripherals.RCC;
 const PWR = microzig.chip.peripherals.PWR;
@@ -42,7 +42,7 @@ pub fn enable_gpio_port(used_gpios_port: u8) void {
     });
 }
 
-pub fn enable_uart(comptime index: emums.UART_V3_Type) void {
+pub fn enable_uart(comptime index: enums.UART_V3_Type) void {
     switch (index) {
         .LPUART1 => RCC.APB1ENR2.modify(.{ .LPUART1EN = 1 }),
         .USART1 => RCC.APB2ENR.modify(.{ .USART1EN = 1 }),
@@ -53,7 +53,7 @@ pub fn enable_uart(comptime index: emums.UART_V3_Type) void {
     }
 }
 
-pub fn enable_i2c(comptime i2cindex: emums.I2C_V2_Type, clock: ICSW) void {
+pub fn enable_i2c(comptime i2cindex: enums.I2C_V2_Type, clock: ICSW) void {
     RCC.APB1ENR1.modify(switch (i2cindex) {
         .I2C1 => .{ .I2C1EN = 1 },
         .I2C2 => .{ .I2C2EN = 1 },
@@ -94,3 +94,10 @@ pub fn enable_rtc_lcd() void {
         .LCDEN = 1,
     });
 }
+
+pub fn enable_dma(index: enums.DMA_V2_Type) void {
+    switch (index) {
+        .DMA1 => RCC.AHB1ENR.modify(.{ .DMA1EN = 1 }),
+        .DMA2 => RCC.AHB1ENR.modify(.{ .DMA2EN = 1 }),
+    }
+}
diff --git a/port/stmicro/stm32/src/hals/common/bdma_v1.zig b/port/stmicro/stm32/src/hals/common/bdma_v1.zig
new file mode 100644
index 000000000..f12f2486e
--- /dev/null
+++ b/port/stmicro/stm32/src/hals/common/bdma_v1.zig
@@ -0,0 +1,127 @@
+// The current bdma-v1 does not include the DMA channel cluster in the DMA struct
+// This is due to the way embassy represent cluster in the json definition.
+// We need to fix this in the embassy gen from regz.
+const std = @import("std");
+const microzig = @import("microzig");
+const util = @import("../common/util.zig");
+const dma_common = @import("dma_common.zig");
+pub const Instances = @import("./enums.zig").DMA_V1_Type;
+
+const hal = microzig.hal;
+const DMA_Peripheral = microzig.chip.types.peripherals.bdma_v1.DMA;
+
+fn get_regs(comptime instance: Instances) *volatile DMA_Peripheral {
+    return @field(microzig.chip.peripherals, @tagName(instance));
+}
+
+pub const Error = error{
+    BufferOverflow,
+};
+
+pub const ChannelNumber = enum(u3) {
+    Channel1,
+    Channel2,
+    Channel3,
+    Channel4,
+    Channel5,
+    Channel6,
+    Channel7,
+};
+
+pub const Channel = dma_common.Channel;
+pub const ChannelEvent = dma_common.ChannelEvent;
+
+// Buffer place in region that is accesssible to DMA
+// There is 14 channel max.
+const countDmaChannel = microzig.chip.properties.dma_channel_count orelse 14;
+
+var dma_buffer: [countDmaChannel * 100]u8 linksection(".dma_buffer") = undefined;
+
+const DMA1_InteruptName = .{
+    "DMA1_Channel1",
+    "DMA1_Channel2",
+    "DMA1_Channel3",
+    "DMA1_Channel4",
+    "DMA1_Channel5",
+    "DMA1_Channel6",
+    "DMA1_Channel7",
+};
+
+const DMA2_InteruptName = .{
+    "DMA2_Channel1",
+    "DMA2_Channel2",
+    "DMA2_Channel3",
+    "DMA2_Channel4",
+    "DMA2_Channel5",
+    "DMA2_Channel6",
+    "DMA2_Channel7",
+};
+
+const DMA_InterputName = .{
+    DMA1_InteruptName,
+    DMA2_InteruptName,
+};
+
+pub fn DMA(comptime dma_ctrl: Instances, comptime ch: ChannelNumber) type {
+    const reg_dma = get_regs(dma_ctrl);
+
+    const buffer_idx = (@intFromEnum(dma_ctrl) - 1) * 7 + @intFromEnum(ch);
+    const start = buffer_idx * 100;
+
+    // Here we are not able to use comptimeFmt since it will introduce dependency loop
+    // due to std_options.
+    const interrupt_name = DMA_InterputName[@intFromEnum(dma_ctrl) - 1][@intFromEnum(ch)];
+    const interrupt_index = blk: for (microzig.chip.interrupts) |*interrupt| {
+        if (std.mem.eql(u8, interrupt_name, interrupt.name)) {
+            break :blk interrupt.index;
+        }
+    } else @panic("Interrupt index not found");
+
+    return struct {
+        var channel: ?Channel = null;
+
+        pub fn DMA_Handler() callconv(.c) void {
+            const event = read_events();
+            clear_events(event);
+            if (channel) |*init_chan| {
+                init_chan.deliver_event(event);
+            }
+        }
+
+        pub fn clear_events(events: ChannelEvent) void {
+            const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@intFromEnum(ch)));
+            const bits: u32 = @as(u4, @bitCast(events));
+            reg_dma.IFCR.raw |= (bits & 0xF) << ch_evt_idx;
+        }
+
+        pub fn read_events() ChannelEvent {
+            const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@intFromEnum(ch)));
+            return @bitCast(@as(u4, @truncate(reg_dma.ISR.raw >> ch_evt_idx)));
+        }
+
+        pub fn enable_interrupt() void {
+            if (microzig.cpu.using_ram_vector_table) {
+                @field(microzig.cpu.ram_vector_table, interrupt_name) = .{ .c = DMA_Handler };
+            } else {
+                const vector_table: *microzig.cpu.VectorTable = @ptrFromInt(0x0);
+                std.debug.assert(@field(vector_table, interrupt_name).* == @intFromPtr(&DMA_Handler));
+            }
+            microzig.interrupt.enable(@as(microzig.cpu.ExternalInterrupt, @enumFromInt(interrupt_index)));
+        }
+
+        pub fn get_channel() *Channel {
+            if (channel) |*init_ch| {
+                return init_ch;
+            }
+            hal.rcc.enable_dma(dma_ctrl);
+            const channel_base: usize = @intFromPtr(reg_dma) + 0x8 + (20 * @as(usize, @intFromEnum(ch)));
+
+            channel = Channel{
+                .reg_channel = @ptrFromInt(channel_base),
+                .in_progress = false,
+                .dma_buffer = dma_buffer[start..][0..100],
+            };
+            return &channel.?;
+        }
+    };
+}
diff --git a/port/stmicro/stm32/src/hals/common/bdma_v2.zig b/port/stmicro/stm32/src/hals/common/bdma_v2.zig
new file mode 100644
index 000000000..5ad0b5ed1
--- /dev/null
+++ b/port/stmicro/stm32/src/hals/common/bdma_v2.zig
@@ -0,0 +1,127 @@
+// The current bdma-v1 does not include the DMA channel cluster in the DMA struct
+// This is due to the way embassy represent cluster in the json definition.
+// We need to fix this in the embassy gen from regz.
+const std = @import("std");
+const microzig = @import("microzig");
+const util = @import("../common/util.zig");
+const dma_common = @import("dma_common.zig");
+pub const Instances = @import("./enums.zig").DMA_V2_Type;
+
+const hal = microzig.hal;
+const DMA_Peripheral = microzig.chip.types.peripherals.bdma_v2.DMA;
+
+fn get_regs(comptime instance: Instances) *volatile DMA_Peripheral {
+    return @field(microzig.chip.peripherals, @tagName(instance));
+}
+
+pub const Error = error{
+    BufferOverflow,
+};
+
+pub const ChannelNumber = enum(u3) {
+    Channel1,
+    Channel2,
+    Channel3,
+    Channel4,
+    Channel5,
+    Channel6,
+    Channel7,
+};
+
+pub const Channel = dma_common.Channel;
+pub const ChannelEvent = dma_common.ChannelEvent;
+
+// Buffer place in region that is accesssible to DMA
+// There is 14 channel max.
+const countDmaChannel = microzig.chip.properties.dma_channel_count orelse 14;
+
+var dma_buffer: [countDmaChannel * 100]u8 linksection(".dma_buffer") = undefined;
+
+const DMA1_InteruptName = .{
+    "DMA1_Channel1",
+    "DMA1_Channel2",
+    "DMA1_Channel3",
+    "DMA1_Channel4",
+    "DMA1_Channel5",
+    "DMA1_Channel6",
+    "DMA1_Channel7",
+};
+
+const DMA2_InteruptName = .{
+    "DMA2_Channel1",
+    "DMA2_Channel2",
+    "DMA2_Channel3",
+    "DMA2_Channel4",
+    "DMA2_Channel5",
+    "DMA2_Channel6",
+    "DMA2_Channel7",
+};
+
+const DMA_InterputName = .{
+    DMA1_InteruptName,
+    DMA2_InteruptName,
+};
+
+pub fn DMA(comptime dma_ctrl: Instances, comptime ch: ChannelNumber) type {
+    const reg_dma = get_regs(dma_ctrl);
+
+    const buffer_idx = (@intFromEnum(dma_ctrl) - 1) * 7 + @intFromEnum(ch);
+    const start = buffer_idx * 100;
+
+    // Here we are not able to use comptimeFmt since it will introduce dependency loop
+    // due to std_options.
+    const interrupt_name = DMA_InterputName[@intFromEnum(dma_ctrl) - 1][@intFromEnum(ch)];
+    const interrupt_index = blk: for (microzig.chip.interrupts) |*interrupt| {
+        if (std.mem.eql(u8, interrupt_name, interrupt.name)) {
+            break :blk interrupt.index;
+        }
+    } else @panic("Interrupt index not found");
+
+    return struct {
+        var channel: ?Channel = null;
+
+        pub fn DMA_Handler() callconv(.c) void {
+            const event = read_events();
+            clear_events(event);
+            if (channel) |*init_chan| {
+                init_chan.deliver_event(event);
+            }
+        }
+
+        pub fn clear_events(events: ChannelEvent) void {
+            const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@intFromEnum(ch)));
+            const bits: u32 = @as(u4, @bitCast(events));
+            reg_dma.IFCR.raw |= (bits & 0xF) << ch_evt_idx;
+        }
+
+        pub fn read_events() ChannelEvent {
+            const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@intFromEnum(ch)));
+            return @bitCast(@as(u4, @truncate(reg_dma.ISR.raw >> ch_evt_idx)));
+        }
+
+        pub fn enable_interrupt() void {
+            if (microzig.cpu.using_ram_vector_table) {
+                @field(microzig.cpu.ram_vector_table, interrupt_name) = .{ .c = DMA_Handler };
+            } else {
+                const vector_table: *microzig.cpu.VectorTable = @ptrFromInt(0x0);
+                std.debug.assert(@field(vector_table, interrupt_name).* == @intFromPtr(&DMA_Handler));
+            }
+            microzig.interrupt.enable(@as(microzig.cpu.ExternalInterrupt, @enumFromInt(interrupt_index)));
+        }
+
+        pub fn get_channel() *Channel {
+            if (channel) |*init_ch| {
+                return init_ch;
+            }
+            hal.rcc.enable_dma(dma_ctrl);
+            const channel_base: usize = @intFromPtr(reg_dma) + 0x8 + (20 * @as(usize, @intFromEnum(ch)));
+
+            channel = Channel{
+                .reg_channel = @ptrFromInt(channel_base),
+                .in_progress = false,
+                .dma_buffer = dma_buffer[start..][0..100],
+            };
+            return &channel.?;
+        }
+    };
+}
diff --git a/port/stmicro/stm32/src/hals/common/dma_common.zig b/port/stmicro/stm32/src/hals/common/dma_common.zig
new file mode 100644
index 000000000..3018ec4da
--- /dev/null
+++ b/port/stmicro/stm32/src/hals/common/dma_common.zig
@@ -0,0 +1,117 @@
+const microzig = @import("microzig");
+// bdma_v1 and  v2 has the same cluster definition
+// Type would coerce.
+const bdma_v1 = microzig.chip.types.peripherals.bdma_v1;
+
+const PriorityLevel = bdma_v1.PL;
+const Direction = bdma_v1.DIR;
+const Size = bdma_v1.SIZE;
+const CH = bdma_v1.CH;
+
+pub const Error = error{
+    BufferOverflow,
+};
+
+pub const ChannelEvent = packed struct(u4) {
+    pending_event: bool,
+    transfer_complete: bool,
+    half_transfer: bool,
+    transfer_error: bool,
+};
+
+pub const Config = struct {
+
+    //Channel Configuration
+    priority: PriorityLevel = .Low,
+    direction: Direction = .FromPeripheral,
+    peripheral_size: Size = .Bits8,
+    memory_size: Size = .Bits8,
+
+    //Channel Control Flags
+    peripheral_increment: bool = false,
+    memory_increment: bool = false,
+    circular_mode: bool = false,
+    memory_to_memory: bool = false,
+    transfer_complete_interrupt: bool = false,
+    half_transfer_interrupt: bool = false,
+    transfer_error_interrupt: bool = false,
+
+    //Channel Transfer Parameters
+    mem_address: ?u32 = null,
+    periph_address: u32,
+    transfer_count: ?u16 = null,
+};
+
+pub const Channel = struct {
+    const Self = @This();
+    reg_channel: *volatile CH,
+    in_progress: bool,
+    dma_buffer: []u8,
+
+    pub fn apply(self: *const Self, config: Config) void {
+        self.reg_channel.CR.modify(.{
+            .EN = 0,
+            .DIR = config.direction,
+            .CIRC = @intFromBool(config.circular_mode),
+            .PINC = @intFromBool(config.peripheral_increment),
+            .MINC = @intFromBool(config.memory_increment),
+            .PSIZE = config.peripheral_size,
+            .MSIZE = config.memory_size,
+            .PL = config.priority,
+            .MEM2MEM = @intFromBool(config.memory_to_memory),
+            .TCIE = @intFromBool(config.transfer_complete_interrupt),
+            .HTIE = @intFromBool(config.half_transfer_interrupt),
+            .TEIE = @intFromBool(config.transfer_error_interrupt),
+        });
+
+        if (config.mem_address) |address| {
+            self.reg_channel.MAR = address;
+        }
+        if (config.transfer_count) |count| {
+            self.reg_channel.NDTR.modify_one("NDT", count);
+        }
+        self.reg_channel.PAR = config.periph_address;
+    }
+
+    pub fn start(self: *Self) void {
+        self.in_progress = true;
+        self.reg_channel.CR.modify_one("EN", 1);
+    }
+
+    pub fn stop(self: *const Self) void {
+        self.in_progress = false;
+        self.reg_channel.CR.modify_one("EN", 0);
+    }
+
+    pub fn is_in_progress(self: *const Self) bool {
+        return self.in_progress;
+    }
+
+    pub fn deliver_event(self: *Self, event: ChannelEvent) void {
+        if (event.transfer_complete) {
+            self.in_progress = false;
+        }
+
+        if (event.transfer_error) {
+            self.in_progress = false;
+            // TODO: Find a better solution: https://github.com/ZigEmbeddedGroup/microzig/issues/806
+            @panic("DMA transfer errored, make sur device is correctly configure and memory bus can be reach by DMA");
+        }
+    }
+
+    pub fn load_memeory_data(self: *const Self, buffer: []const u8) Error!void {
+        if (buffer.len > self.dma_buffer.len) {
+            return Error.BufferOverflow;
+        }
+        @memcpy(self.dma_buffer[0..buffer.len], buffer);
+
+        self.reg_channel.NDTR.modify_one("NDT", @as(u16, @intCast(buffer.len)));
+        self.reg_channel.MAR = @intFromPtr(&self.dma_buffer);
+    }
+
+    /// Reads the number of remaining transfers.
+    /// 0 == DMA has finished all transfers.
+    pub inline fn channel_remain_count(self: *const Self) u16 {
+        return self.reg_channel.NDTR.read().NDT;
+    }
+};
diff --git a/port/stmicro/stm32/src/hals/common/enums.zig b/port/stmicro/stm32/src/hals/common/enums.zig
index 61a7ccb5e..171689a9e 100644
--- a/port/stmicro/stm32/src/hals/common/enums.zig
+++ b/port/stmicro/stm32/src/hals/common/enums.zig
@@ -5,3 +5,7 @@ pub const UART_V3_Type = util.create_peripheral_enum_from_type("usart_v3");
 pub const I2C_V2_Type = util.create_peripheral_enum("I2C", "i2c_v2");
 
 pub const SPI_V2_Type = util.create_peripheral_enum("SPI", "spi_v2");
+
+pub const DMA_V1_Type = util.create_peripheral_enum("DMA", "bdma_v1");
+
+pub const DMA_V2_Type = util.create_peripheral_enum("DMA", "bdma_v2");
diff --git a/port/stmicro/stm32/src/hals/common/spi_v2.zig b/port/stmicro/stm32/src/hals/common/spi_v2.zig
index 13ebdc8b0..93da6c33a 100644
--- a/port/stmicro/stm32/src/hals/common/spi_v2.zig
+++ b/port/stmicro/stm32/src/hals/common/spi_v2.zig
@@ -49,8 +49,6 @@ pub const SPI = struct {
             else => .Div256,
         };
 
-        std.log.info("Select devider {}", .{br});
-
         self.spi.CR1.raw = 0; // Disable SPI end clear configs before configuration
         self.spi.CR1.modify(.{
             .CPOL = config.polarity,
@@ -86,8 +84,6 @@ pub const SPI = struct {
         }
 
         self.spi.CR1.modify(.{ .SPE = 1 }); // Enable SPI
-
-        std.log.info("SPI status {}", .{self.spi.SR.read()});
     }
 
     fn check_tx(self: *const SPI) bool {
diff --git a/port/stmicro/stm32/src/hals/common/systick.zig b/port/stmicro/stm32/src/hals/common/systick.zig
index a2841afa6..6d61c2056 100644
--- a/port/stmicro/stm32/src/hals/common/systick.zig
+++ b/port/stmicro/stm32/src/hals/common/systick.zig
@@ -19,6 +19,14 @@ const MAX_COUNTER = 0xFFFFFF;
 // HAL should provide both value.
 // See: https://developer.arm.com/documentation/dui0497/a/cortex-m0-peripherals/optional-system-timer--systick/systick-control-and-status-register
 pub fn init() SystickError!void {
+    if (microzig.cpu.using_ram_vector_table) {
+        microzig.cpu.ram_vector_table.SysTick = .{ .c = SysTick_handler };
+    } else {
+        const vector_table: *microzig.cpu.VectorTable = @ptrFromInt(0x0);
+        // SysTick_Handler need to be setup in the interrupt table
+        std.debug.assert(vector_table.SysTick.* == @intFromPtr(&SysTick_handler));
+    }
+
     const use_processor_clk = if (hal.get_sys_clk() > MAX_COUNTER) false else true;
     const sys_freq = if (use_processor_clk) hal.get_sys_clk() else hal.get_systick_clk();
 
diff --git a/port/stmicro/stm32/src/hals/common/uart_v3.zig b/port/stmicro/stm32/src/hals/common/uart_v3.zig
index d598e03e9..eb14aaf76 100644
--- a/port/stmicro/stm32/src/hals/common/uart_v3.zig
+++ b/port/stmicro/stm32/src/hals/common/uart_v3.zig
@@ -1,6 +1,8 @@
 const std = @import("std");
-const UART_V3_Type = @import("enums.zig").UART_V3_Type;
+const bdma_v1 = @import("./bdma_v1.zig");
 const microzig = @import("microzig");
+const UART_V3_Type = @import("enums.zig").UART_V3_Type;
+
 const rcc = microzig.hal.rcc;
 const usart_t = microzig.chip.types.peripherals.usart_v3.USART;
 const STOP = microzig.chip.types.peripherals.usart_v3.STOP;
@@ -35,6 +37,7 @@ pub const Config = struct {
     stop_bits: STOP = .Stop1,
     parity: Parity = .none,
     flow_control: FlowControl = .none,
+    dma: ?*bdma_v1.Channel = null,
 };
 
 pub const StopBits = STOP;
@@ -49,6 +52,8 @@ pub fn Uart(comptime index: UART_V3_Type) type {
     return struct {
         const Self = @This();
 
+        dma: ?*bdma_v1.Channel,
+
         pub fn init(config: Config) Self {
             rcc.enable_uart(index);
 
@@ -86,14 +91,18 @@ pub fn Uart(comptime index: UART_V3_Type) type {
             regs.CR1.modify(.{ .TE = 1 });
             regs.CR1.modify(.{ .RE = 1 });
 
-            return Self{};
+            if (config.dma != null) {
+                regs.CR3.modify(.{ .DMAT = 1 });
+            }
+
+            return Self{ .dma = config.dma };
         }
 
         pub fn get_or_init(config: Config) !Self {
             if (regs.CR1.read().UE == 1) {
                 // UART1 already enabled, don't reinitialize and disturb things;
                 // instead read and use the actual configuration.
-                return Self{};
+                return Self{ .dma = config.dma };
             } else return init(config);
         }
 
@@ -110,11 +119,40 @@ pub fn Uart(comptime index: UART_V3_Type) type {
             };
         }
 
-        pub fn tx(self: Self, ch: u8) void {
+        fn tx_blocking(self: Self, ch: u8) void {
             while (!self.can_write()) {} // Wait for Previous transmission
             regs.TDR.modify(.{ .DR = ch });
         }
 
+        // We assume interrupt handler is setup
+        fn tx(self: Self, buffer: []const u8) void {
+            if (self.dma) |dma| fallback: {
+                while (dma.is_in_progress()) {
+                    // We wait for the last communication to end before sendig other byte
+                    microzig.cpu.wfi();
+                }
+
+                dma.apply(.{
+                    .direction = .FromMemory,
+                    .memory_increment = true,
+                    .periph_address = @intFromPtr(&regs.TDR),
+                    .transfer_complete_interrupt = true,
+                });
+
+                dma.load_memeory_data(buffer) catch {
+                    break :fallback;
+                };
+
+                regs.ICR.modify(.{ .TC = 1 });
+                dma.start();
+                return;
+            }
+
+            for (buffer) |byte| {
+                self.tx_blocking(byte);
+            }
+        }
+
         pub fn txflush(_: Self) void {
             while (regs.ISR.read().TC == 0) {}
         }
@@ -134,9 +172,7 @@ pub fn Uart(comptime index: UART_V3_Type) type {
         }
 
         fn writer_fn(self: *Self, buffer: []const u8) error{}!usize {
-            for (buffer) |byte| {
-                self.tx(byte);
-            }
+            self.tx(buffer);
             return buffer.len;
         }
     };
@@ -182,12 +218,13 @@ pub fn UARTLogger(comptime index: UART_V3_Type) type {
     return struct {
         var logger: ?UartWriter(index) = null;
         var uart: ?Uart(index) = null;
-        pub fn init_logger(config: Config) void {
+
+        pub fn init(config: Config) void {
             uart = Uart(index).init(config);
             logger = UartWriter(index).init(&uart.?, &.{});
             std.log.info("================ STARTING NEW LOGGER ================\r\n", .{});
         }
-        pub fn deinit_logger() void {
+        pub fn deinit() void {
 
             // TODO Deinit usart
             logger = null;
diff --git a/tools/regz/src/embassy.zig b/tools/regz/src/embassy.zig
index 808b289ff..03758bc46 100644
--- a/tools/regz/src/embassy.zig
+++ b/tools/regz/src/embassy.zig
@@ -441,6 +441,7 @@ pub fn load_into_db(db: *Database, path: []const u8) !void {
         // to keep track of.
 
         var has_fpu = false;
+        var dma_channel_count: u32 = 0;
         for (core.interrupts) |interrupt| {
             _ = try db.create_interrupt(device_id, .{
                 .name = interrupt.name,
@@ -450,6 +451,10 @@ pub fn load_into_db(db: *Database, path: []const u8) !void {
             if (std.mem.indexOf(u8, interrupt.name, "FPU")) |_| {
                 has_fpu = true;
             }
+
+            if (std.mem.indexOf(u8, interrupt.name, "DMA")) |_| {
+                dma_channel_count += 1;
+            }
         }
 
         try db.add_device_property(device_id, .{
@@ -457,6 +462,11 @@ pub fn load_into_db(db: *Database, path: []const u8) !void {
             .value = if (has_fpu) "true" else "false",
         });
 
+        try db.add_device_property(device_id, .{
+            .key = "cpu.dmaChannelCount",
+            .value = try std.fmt.allocPrint(allocator, "{d}", .{dma_channel_count}),
+        });
+
         for (core.peripherals) |peripheral| {
             // TODO: don't know what to do if registers is null, so skipping
             const registers = peripheral.registers orelse continue;
diff --git a/tools/regz/src/gen.zig b/tools/regz/src/gen.zig
index 65c9d58b7..0082d8170 100644
--- a/tools/regz/src/gen.zig
+++ b/tools/regz/src/gen.zig
@@ -1414,6 +1414,17 @@ fn process_properties(raw_props: []const Database.DeviceProperty) Properties {
                 log.warn("`has_fpu` property candidate detected but it has no value", .{});
             }
         }
+
+        if (std.mem.eql(u8, prop.key, "cpu.dmaChannelCount")) {
+            if (prop.value) |value| {
+                properties.dma_channel_count = std.fmt.parseInt(u8, value, 10) catch blk: {
+                    log.warn("failed to parse `dma_channel_count` property value: expected integer, got `{s}`", .{value});
+                    break :blk null;
+                };
+            } else {
+                log.warn("`dma_channel_count` property candidate detected but it has no value", .{});
+            }
+        }
     }
 
     return properties;
@@ -1737,6 +1748,7 @@ test "gen.peripheral instantiation" {
             \\    has_mpu: ?bool = null,
             \\    has_fpu: ?bool = null,
             \\    interrupt_priority_bits: ?u8 = null,
+            \\    dma_channel_count: ?u32 = null,
             \\};
             \\
             \\pub const Interrupt = struct {
@@ -1750,6 +1762,7 @@ test "gen.peripheral instantiation" {
             \\    .has_mpu = null,
             \\    .has_fpu = null,
             \\    .interrupt_priority_bits = null,
+            \\    .dma_channel_count = null,
             \\};
             \\
             \\pub const peripherals = struct {
@@ -1818,6 +1831,7 @@ test "gen.peripherals with a shared type" {
             \\    has_mpu: ?bool = null,
             \\    has_fpu: ?bool = null,
             \\    interrupt_priority_bits: ?u8 = null,
+            \\    dma_channel_count: ?u32 = null,
             \\};
             \\
             \\pub const Interrupt = struct {
@@ -1831,6 +1845,7 @@ test "gen.peripherals with a shared type" {
             \\    .has_mpu = null,
             \\    .has_fpu = null,
             \\    .interrupt_priority_bits = null,
+            \\    .dma_channel_count = null,
             \\};
             \\
             \\pub const peripherals = struct {
diff --git a/tools/regz/src/properties.zig b/tools/regz/src/properties.zig
index 4e276cc82..676578146 100644
--- a/tools/regz/src/properties.zig
+++ b/tools/regz/src/properties.zig
@@ -3,4 +3,5 @@ pub const Properties = struct {
     has_mpu: ?bool = null,
     has_fpu: ?bool = null,
     interrupt_priority_bits: ?u8 = null,
+    dma_channel_count: ?u32 = null,
 };