Skip to content

Commit b921a32

Browse files
committed
generate proper kicad project and folder
1 parent cca8f20 commit b921a32

File tree

1 file changed

+107
-9
lines changed

1 file changed

+107
-9
lines changed

inkscape/export_layers.py

Lines changed: 107 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -122,6 +122,75 @@
122122
)
123123
'''
124124

125+
pcb_lib_table = '''
126+
(fp_lib_table
127+
(lib (name pcbart)(type KiCad)(uri "$(KIPRJMOD)/%s")(options "")(descr ""))
128+
)
129+
'''
130+
131+
pcb_project_file = '''
132+
update=2018 March 15, Thursday 14:41:19
133+
version=1
134+
last_client=kicad
135+
[pcbnew]
136+
version=1
137+
LastNetListRead=
138+
UseCmpFile=1
139+
PadDrill=0.600000000000
140+
PadDrillOvalY=0.600000000000
141+
PadSizeH=1.500000000000
142+
PadSizeV=1.500000000000
143+
PcbTextSizeV=1.500000000000
144+
PcbTextSizeH=1.500000000000
145+
PcbTextThickness=0.300000000000
146+
ModuleTextSizeV=1.000000000000
147+
ModuleTextSizeH=1.000000000000
148+
ModuleTextSizeThickness=0.150000000000
149+
SolderMaskClearance=0.000000000000
150+
SolderMaskMinWidth=0.000000000000
151+
DrawSegmentWidth=0.200000000000
152+
BoardOutlineThickness=0.100000000000
153+
ModuleOutlineThickness=0.150000000000
154+
[cvpcb]
155+
version=1
156+
NetIExt=net
157+
[general]
158+
version=1
159+
[eeschema]
160+
version=1
161+
LibDir=
162+
[eeschema/libraries]
163+
LibName1=power
164+
LibName2=device
165+
LibName3=transistors
166+
LibName4=conn
167+
LibName5=linear
168+
LibName6=regul
169+
LibName7=74xx
170+
LibName8=cmos4000
171+
LibName9=adc-dac
172+
LibName10=memory
173+
LibName11=xilinx
174+
LibName12=microcontrollers
175+
LibName13=dsp
176+
LibName14=microchip
177+
LibName15=analog_switches
178+
LibName16=motorola
179+
LibName17=texas
180+
LibName18=intel
181+
LibName19=audio
182+
LibName20=interface
183+
LibName21=digital-audio
184+
LibName22=philips
185+
LibName23=display
186+
LibName24=cypress
187+
LibName25=siliconi
188+
LibName26=opto
189+
LibName27=atmel
190+
LibName28=contrib
191+
LibName29=valves
192+
'''
193+
125194
identity_m = [[1.0,0.0,0.0],[0.0,1.0,0.0]]
126195

127196

@@ -160,6 +229,12 @@ def __init__(self):
160229
# 'Edge.Cuts' : "Edge.Cuts"
161230
}
162231

232+
self.library_folder = "pcbart.pretty"
233+
self.library_table_file = "fp-lib-table"
234+
self.kicad_project_file = "pcbart.pro"
235+
self.kicad_pcb_file = "pcbart.kicad_pcb"
236+
self.export_image_folder = "images"
237+
163238

164239
def coordToKicad(self,XYCoord):
165240
return [
@@ -241,14 +316,25 @@ def processExportLayer(self):
241316

242317
kicad_mod_files = []
243318

319+
#create pcb folder
320+
if not os.path.exists(os.path.join(output_path)):
321+
os.makedirs(os.path.join(output_path))
322+
323+
#create library folder
324+
if not os.path.exists(os.path.join(output_path, self.library_folder)):
325+
os.makedirs(os.path.join(output_path, self.library_folder))
326+
327+
#create images folder
328+
if not os.path.exists(os.path.join(output_path, self.export_image_folder)):
329+
os.makedirs(os.path.join(output_path, self.export_image_folder))
330+
331+
244332
for (layer_id, layer_label, layer_type) in layers:
245333
if layer_type == "fixed":
246334
continue
247335

248336
show_layer_ids = [layer[0] for layer in layers if layer[2] == "fixed" or layer[0] == layer_id]
249337

250-
if not os.path.exists(os.path.join(output_path)):
251-
os.makedirs(os.path.join(output_path))
252338

253339
invert = "true"
254340

@@ -262,25 +348,27 @@ def processExportLayer(self):
262348
self.export_layers(layer_dest_svg_path, show_layer_ids)
263349
# close the file descriptor
264350
os.close(fd)
265-
if self.options.filetype == "kicad_pcb":
266-
png_dest_kicad_path = os.path.join(output_path, "%s_%s.png" % (str(counter).zfill(3), layer_label))
351+
if self.options.filetype == "kicad_pcb":
352+
#path for exported png
353+
png_dest_kicad_path = os.path.join(output_path,self.export_image_folder, "%s_%s.png" % (str(counter).zfill(3), layer_label))
354+
#path for exported kicad
355+
layer_dest_kicad_path = os.path.join(output_path, self.library_folder, "%s_%s.kicad_mod" % (str(counter).zfill(3), layer_label))
356+
#export layer to png
267357
self.exportToPng(layer_dest_svg_path, png_dest_kicad_path)
268-
layer_dest_kicad_path = os.path.join(output_path, "%s_%s.kicad_module" % (str(counter).zfill(3), layer_label))
358+
#export layer png to kicad
269359
self.exportToKicad(png_dest_kicad_path, layer_dest_kicad_path, layer_label, invert )
360+
#collect kicad file path
270361
kicad_mod_files.append(layer_dest_kicad_path)
271362
elif self.options.filetype == "kicad_module":
272363
inkex.debug("kicad_module not implemented")
273364
else:
274365
layer_dest_png_path = os.path.join(output_path, "%s_%s.png" % (str(counter).zfill(3), layer_label))
275366
self.exportToPng(layer_dest_svg_path, layer_dest_png_path)
276367
finally:
277-
# print "ok"
278368
os.remove(layer_dest_svg_path)
279369

280370
counter = counter + 1
281371

282-
283-
284372
kicad_edgecut_string = self.exportEdgeCut()
285373
kicad_drill_string = self.exportDrill()
286374
kicad_modules_string = ""
@@ -289,14 +377,24 @@ def processExportLayer(self):
289377
with open(kicad_file, 'r') as myfile:
290378
kicad_modules_string = kicad_modules_string + myfile.read()
291379

292-
kicad_pcb_path = os.path.join(output_path, "compiled.kicad_pcb" )
380+
kicad_pcb_path = os.path.join(output_path, self.kicad_pcb_file )
381+
kicad_lib_path = os.path.join(output_path, self.library_table_file )
382+
kicad_pro_path = os.path.join(output_path, self.kicad_project_file )
383+
293384
with open(kicad_pcb_path, 'w') as the_file:
294385
the_file.write(pcb_header)
295386
the_file.write(kicad_modules_string)
296387
the_file.write(kicad_edgecut_string)
297388
the_file.write(kicad_drill_string)
298389
the_file.write(pcb_footer)
299390

391+
with open(kicad_lib_path, 'w') as the_file:
392+
the_file.write(pcb_lib_table % (self.library_folder))
393+
394+
with open(kicad_pro_path, 'w') as the_file:
395+
the_file.write(pcb_project_file)
396+
397+
300398
if (self.options.openkicad):
301399
self.openKicad(kicad_pcb_path)
302400

0 commit comments

Comments
 (0)