SDK v1.1.0

All of the following by @asiekierka :

New platforms

• PC Engine/TurboGrafx-16 - This is a target I didn't figure we'd ever support well, given the complexities of targeting a heavily modified 6502 with a sort of MMU in it, but I'm very happy to be proven wrong. Enormous thanks, @asiekierka!

Compiler Optimizations

• llvm-mos/llvm-mos#303 - Emit BIT immediate on 65C02 to set V.
• llvm-mos/llvm-mos#303 - Emit better X<->Y transfer sequences on 65C02 and HuC6280.

Bug fixes

• llvm-mos/llvm-mos#304 - Emit correct (and new) ELF relocations for HuC6280 opcodes.
• llvm-mos/llvm-mos#307 - Fix max instruction length calculation for HuC6280, which could possibly result in emitting too-far branches.
• llvm-mos/llvm-mos#308 - Slightly correct cost calculations for imaginary register load/store on HuC6280.
• llvm-mos/llvm-mos#309 - Add accidentally missing indirect zero page opcodes (the CC1 family) to 65C02.
• #123 - Fix alignment between the Commander X16 and llvm-mos calling convention.

SDK v1.0.0

Process

• The compiler has been stable enough for long enough that it makes sense to
  start using semver more formally. So, without further ado, version 1.0.0!

Breaking changes

• #115 - Breaking! - Replace cpm_parse_filename library function with a syscall, but with different parameters. - @davidgiven

Compiler

By @asiekierka:

• llvm-mos/llvm-mos#296 (and successor PRs) - Adds assembler support for illegal opcodes, remaining Rockwell and WDC 65C02 opcodes, WDC 65816 opcodes, and HuC6280 opcodes (PC Engine).
• llvm-mos/llvm-mos#297 - Code generator now emits CLA/CLX/CLY on HuC6280.
• llvm-mos/llvm-mos#299 - Code generator now emits TXY/TYX on W65816/65EL02.
• llvm-mos/llvm-mos#302 - Code generator now emits INC A/DEC A on 65C02.

SDK

• #114 - Update CPM65; add some missing ctype and string functions. - @davidgiven
• #117 - On Mega65 unmap $A000-$BFFF ROM region to provide 45KB of contiguous RAM. - @gurcei

By @asiekierka:

• #119 and later - Add RCP8/e platform for the RedPower Minecraft mod's CPU.
• #122 - Fix off-by-one stack pointer initializations in various targets, obtaining one more byte of soft stack.

SDK v0.13.2

Bug fixes

• #112: Fix a bug in the cpm65 linker script causing certain addresses not to be relocated. Thanks @davidgiven !

Miscellaneous

• Merged from upstream LLVM

• Reduce distribution size by removing niche utilities.

SDK v0.13.1

New targets

• Commodore PET (mos-pet-clang): Thanks @williamw4096 !

Bug fixes

• The CPM/65 elftocpm65 tool no longer attempts to relocate absolute addresses. Thanks @davidgiven !

• The NES targets now once again compute DPCM offsets correctly. This caused DPCM samples not to work with the included ft2 library.

Library improvements

• Made string/mem libc functions weak, so they can be easily overridden by user code.

• The CX16 stack has been moved from banked RAM to main RAM, allowing use of the banked area. Thanks @XarkLabs !

SDK v0.13.0

Breaking Changes

• Removed OVERLAY section type extension from linker script language. It isn't needed any more in our stock linker scripts, and is better done by either using the OVERLAY section type, or more preferably, using the high bits of the 32-bit VMA to separate out banks. The latter allows encoding the bank number directly into a symbol's address.

• Removed OUTPUT_FORMAT(binary) from linker script. This decreases the diff from upstream, and we no longer need it. It's difficult to use and kind of a misfeature; the custom output format extension completely supersedes it.

SDK v0.12.1

Bug Fixes

• Fixed a bug in the NES targets that caused incorrect Mesen labels to be generated when the C symbols were placed in PRG-RAM and the data segment was nonempty.
• Fixed #99, which caused non-zero return values for various cbm_k_* functions in the Commodore targets on successful return. (Thanks @mlund, @cnelson20 !)

SDK v0.12.0

Breaking Changes

• The SDK no longer includes the additional libraries, headers, and tools needed for building rust-mos. These are huge, and the SDK is already a quite hefty download and install.

Optimizations

• Fixed llvm-mos/llvm-mos#182, where .zp.data and .zp.bss references would use absolute addressing modes.
• Fixed llvm-mos/llvm-mos#279, where negating a boolean would be done with control flow rather than EOR #1.

Miscellaneous

• Merged llvm/llvm-project@6a63e21cf4e6
• Improved debug location tracking throughout the backend.

SDK v0.11.8

Bug Fixes

• neslib -- Fixed almost completely broken vram_inc implementation.

Miscellaneous

• The release packages now include the headers, libraries, and tools needed to build rust-mos. This should allow that project to consume our binary releases rather than rebuilding llvm-mos from scratch.

SDK v0.11.7

New Features and Improvements

• Partial implementations of C++ headers <algorithm>, <array>, <iterator>, <utility>, and <limits>. Thanks, @pfusik !

• The assembler now accepts uppercase register names (i.e., LDA (32),Y, not just LDA (32),y). Thanks, @pfusik !

• The default C64 target now swaps out the BASIC ROM before program start, which increases usable contiguous memory to 50KiB. Thanks, @OskarLinde !

• Merged from upstream LLVM.

Bug Fixes

• Setting PRG-(NV)RAM or CHR-(NV)RAM sizes to zero on NES targets now works properly. Previously, zero would be fed into the formula used to compute shift counts for the iNES 2.0 header, but zero is out of the legal range of those formula.

SDK v0.11.6

New targets

• The new atari8-stdcart target now allows compiling to a standard 8KiB or 16KiB Atari 8-bit cartridge. Thanks, @cwedgwood !

Assembler improvements

• INC A, INA, DEA, and DEC A spellings are now supported for INC and DEC. Thanks, @pfusik !

Optimizations

• The compiler now spends more time on Loop Strength Reduction, the most important loop optimization pass. Loop quality is particularly important on the 6502, especially relative to overall program size, so we can afford to spend longer on it. Overall, it doesn't seem to impact the compile times that much, but we see a sizable gain on some benchmarks.

Cleanup

• The compiler now uses the .zeropage directive to introduce imaginary registers when generating assembly output. This means that uses of imaginary registers are no longer wrapped with mos8(...), which makes assembly listings considerably easier to read.