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traverse in traverse_all_edges_unordered
1 parent 2c829a8 commit 63abd11

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7 files changed

+80
-76
lines changed

7 files changed

+80
-76
lines changed

‎turbopack/crates/turbopack-core/src/module_graph/async_module_info.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ async fn compute_async_module_info_single(
7979
&mut (),
8080
|_, _, _| Ok(GraphTraversalAction::Continue),
8181
|parent_info, module, _| {
82-
let Some((parent_module, ref_data)) = parent_info else {
82+
let Some((parent_module, ref_data, _)) = parent_info else {
8383
// An entry module
8484
return Ok(());
8585
};

‎turbopack/crates/turbopack-core/src/module_graph/export_usage.rs‎

Lines changed: 13 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -14,10 +14,14 @@ pub async fn compute_export_usage_info(
1414
) -> Result<Vc<ExportUsageInfo>> {
1515
let mut used_exports = FxHashMap::<_, ModuleExportUsageInfo>::default();
1616
let graph = graph.read_graphs().await?;
17-
graph.traverse_all_edges_unordered(|(_, ref_data, _), target| {
17+
graph.traverse_all_edges_unordered(|parent, target| {
1818
let e = used_exports.entry(target).or_default();
19-
20-
e.add(&ref_data.export);
19+
if let Some((_, ref_data, _)) = parent {
20+
e.add(&ref_data.export);
21+
} else {
22+
// Entry
23+
*e = ModuleExportUsageInfo::All;
24+
}
2125

2226
Ok(())
2327
})?;
@@ -103,15 +107,14 @@ impl ExportUsageInfo {
103107
module: ResolvedVc<Box<dyn Module>>,
104108
) -> Result<Vc<ModuleExportUsage>> {
105109
let is_circuit_breaker = self.circuit_breakers.contains(&module);
106-
let export_usage = if let Some(exports) = self.used_exports.get(&module) {
107-
exports.clone().resolved_cell()
108-
} else {
109-
// We exclude template files from tree shaking because they are entrypoints to the
110-
// module graph.
111-
ModuleExportUsageInfo::all().to_resolved().await?
110+
let Some(exports) = self.used_exports.get(&module) else {
111+
anyhow::bail!(
112+
"export usage not found for module: {:?}",
113+
module.ident_string().await?
114+
);
112115
};
113116
Ok(ModuleExportUsage {
114-
export_usage,
117+
export_usage: exports.clone().resolved_cell(),
115118
is_circuit_breaker,
116119
}
117120
.cell())

‎turbopack/crates/turbopack-core/src/module_graph/import_usage.rs‎

Lines changed: 17 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -41,23 +41,25 @@ pub async fn compute_import_usage_info(
4141
let mut edges = FxHashSet::default();
4242
let mut references = FxHashSet::default();
4343
let graph = graph.read_graphs().await?;
44-
graph.traverse_all_edges_unordered(|(source, ref_data, edge), target| {
45-
match &ref_data.import {
46-
ImportUsage::Global => {
47-
// has to always be included
48-
}
49-
ImportUsage::Exports(exports) => {
50-
debug_assert!(!exports.is_empty());
51-
let source_used_exports = export_usage_info.used_exports_ref(source);
44+
graph.traverse_all_edges_unordered(|parent, target| {
45+
if let Some((source, ref_data, edge)) = parent {
46+
match &ref_data.import {
47+
ImportUsage::Global => {
48+
// has to always be included
49+
}
50+
ImportUsage::Exports(exports) => {
51+
debug_assert!(!exports.is_empty());
52+
let source_used_exports = export_usage_info.used_exports_ref(source);
5253

53-
if exports
54-
.iter()
55-
.all(|e| !source_used_exports.is_export_used(e))
56-
{
57-
unused_references_name.insert((source, ref_data.export.clone(), target));
54+
if exports
55+
.iter()
56+
.all(|e| !source_used_exports.is_export_used(e))
57+
{
58+
unused_references_name.insert((source, ref_data.export.clone(), target));
5859

59-
edges.insert(edge);
60-
references.insert(ref_data.reference);
60+
edges.insert(edge);
61+
references.insert(ref_data.reference);
62+
}
6163
}
6264
}
6365
}

‎turbopack/crates/turbopack-core/src/module_graph/merged_modules.rs‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -329,7 +329,7 @@ pub async fn compute_merged_modules(module_graph: Vc<ModuleGraph>) -> Result<Vc<
329329
chunk_group.entries(),
330330
&mut (),
331331
|parent_info, node, _| {
332-
if parent_info.is_none_or(|(_, r)| r.chunking_type.is_parallel())
332+
if parent_info.is_none_or(|(_, r, _)| r.chunking_type.is_parallel())
333333
&& visited.insert(node)
334334
{
335335
Ok(GraphTraversalAction::Continue)
@@ -380,7 +380,7 @@ pub async fn compute_merged_modules(module_graph: Vc<ModuleGraph>) -> Result<Vc<
380380
}
381381
}
382382

383-
if let Some((parent, _)) = parent_info {
383+
if let Some((parent, _, _)) = parent_info {
384384
let same_bitmap = module_merged_groups.get(&parent).unwrap()
385385
== module_merged_groups.get(&module).unwrap();
386386

@@ -468,7 +468,7 @@ pub async fn compute_merged_modules(module_graph: Vc<ModuleGraph>) -> Result<Vc<
468468
|parent_info, node, _| {
469469
let module = node;
470470

471-
if let Some((parent, _)) = parent_info {
471+
if let Some((parent, _, _)) = parent_info {
472472
let same_bitmap = module_merged_groups.get(&parent).unwrap()
473473
== module_merged_groups.get(&module).unwrap();
474474

@@ -480,7 +480,7 @@ pub async fn compute_merged_modules(module_graph: Vc<ModuleGraph>) -> Result<Vc<
480480
}
481481
}
482482

483-
if parent_info.is_none_or(|(parent, _)| {
483+
if parent_info.is_none_or(|(parent, _, _)| {
484484
module_merged_groups.get(&parent).unwrap()
485485
!= module_merged_groups.get(&module).unwrap()
486486
}) {
@@ -490,7 +490,7 @@ pub async fn compute_merged_modules(module_graph: Vc<ModuleGraph>) -> Result<Vc<
490490
// necessarily needed for browser),
491491
exposed_modules_imported.insert(module);
492492
}
493-
if parent_info.is_some_and(|(_, r)| matches!(r.export, ExportUsage::All)) {
493+
if parent_info.is_some_and(|(_, r, _)| matches!(r.export, ExportUsage::All)) {
494494
// This module needs to be exposed:
495495
// - namespace import from another group
496496
exposed_modules_namespace.insert(module);

‎turbopack/crates/turbopack-core/src/module_graph/mod.rs‎

Lines changed: 19 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1144,25 +1144,21 @@ impl ModuleGraphRef {
11441144
pub fn traverse_all_edges_unordered(
11451145
&self,
11461146
mut visitor: impl FnMut(
1147-
(ResolvedVc<Box<dyn Module>>, &'_ RefData, GraphEdgeIndex),
1147+
Option<(ResolvedVc<Box<dyn Module>>, &'_ RefData, GraphEdgeIndex)>,
11481148
ResolvedVc<Box<dyn Module>>,
11491149
) -> Result<()>,
11501150
) -> Result<()> {
1151-
for (graph_idx, graph) in self.graphs.iter().enumerate() {
1152-
let graph = &graph.graph;
1153-
for edge in graph.edge_references() {
1154-
let idx = GraphEdgeIndex::new(graph_idx as u32, edge.id());
1155-
// TODO this ignores the edges directly ignored by unused_references, but not the
1156-
// subgraphs that become disconnected because of that.
1157-
if self.unused_references.contains_edge(&idx) {
1158-
continue;
1159-
}
1160-
let source = graph.node_weight(edge.source()).unwrap().module();
1161-
let target = graph.node_weight(edge.target()).unwrap().module();
1162-
visitor((source, edge.weight(), idx), target)?;
1163-
}
1164-
}
1165-
Ok(())
1151+
let entries = self.graphs.iter().flat_map(|g| g.entry_modules());
1152+
1153+
self.traverse_edges_from_entries_dfs(
1154+
entries,
1155+
&mut (),
1156+
|parent, target, _| {
1157+
visitor(parent, target)?;
1158+
Ok(GraphTraversalAction::Continue)
1159+
},
1160+
|_, _, _| Ok(()),
1161+
)
11661162
}
11671163

11681164
/// Traverses all reachable edges in dfs order. The preorder visitor can be used to
@@ -1189,12 +1185,12 @@ impl ModuleGraphRef {
11891185
entries: impl IntoIterator<Item = ResolvedVc<Box<dyn Module>>>,
11901186
state: &mut S,
11911187
mut visit_preorder: impl FnMut(
1192-
Option<(ResolvedVc<Box<dyn Module>>, &'_ RefData)>,
1188+
Option<(ResolvedVc<Box<dyn Module>>, &'_ RefData, GraphEdgeIndex)>,
11931189
ResolvedVc<Box<dyn Module>>,
11941190
&mut S,
11951191
) -> Result<GraphTraversalAction>,
11961192
mut visit_postorder: impl FnMut(
1197-
Option<(ResolvedVc<Box<dyn Module>>, &'_ RefData)>,
1193+
Option<(ResolvedVc<Box<dyn Module>>, &'_ RefData, GraphEdgeIndex)>,
11981194
ResolvedVc<Box<dyn Module>>,
11991195
&mut S,
12001196
) -> Result<()>,
@@ -1223,6 +1219,7 @@ impl ModuleGraphRef {
12231219
.graph
12241220
.edge_weight(parent_edge)
12251221
.unwrap(),
1222+
GraphEdgeIndex::new(parent_node.graph_idx, parent_edge),
12261223
)),
12271224
None => None,
12281225
};
@@ -1817,14 +1814,14 @@ pub mod tests {
18171814
&mut (),
18181815
|parent, target, _| {
18191816
preorder_visits.push((
1820-
parent.map(|(node, _)| module_to_name.get(&node).unwrap().clone()),
1817+
parent.map(|(node, _, _)| module_to_name.get(&node).unwrap().clone()),
18211818
module_to_name.get(&target).unwrap().clone(),
18221819
));
18231820
Ok(GraphTraversalAction::Continue)
18241821
},
18251822
|parent, target, _| {
18261823
postorder_visits.push((
1827-
parent.map(|(node, _)| module_to_name.get(&node).unwrap().clone()),
1824+
parent.map(|(node, _, _)| module_to_name.get(&node).unwrap().clone()),
18281825
module_to_name.get(&target).unwrap().clone(),
18291826
));
18301827
Ok(())
@@ -1877,14 +1874,14 @@ pub mod tests {
18771874
&mut (),
18781875
|parent, target, _| {
18791876
preorder_visits.push((
1880-
parent.map(|(node, _)| module_to_name.get(&node).unwrap().clone()),
1877+
parent.map(|(node, _, _)| module_to_name.get(&node).unwrap().clone()),
18811878
module_to_name.get(&target).unwrap().clone(),
18821879
));
18831880
Ok(GraphTraversalAction::Continue)
18841881
},
18851882
|parent, target, _| {
18861883
postorder_visits.push((
1887-
parent.map(|(node, _)| module_to_name.get(&node).unwrap().clone()),
1884+
parent.map(|(node, _, _)| module_to_name.get(&node).unwrap().clone()),
18881885
module_to_name.get(&target).unwrap().clone(),
18891886
));
18901887
Ok(())

‎turbopack/crates/turbopack-core/src/module_graph/module_batches.rs‎

Lines changed: 23 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -293,7 +293,7 @@ impl PreBatches {
293293
inherit_async: false,
294294
hoisted: false,
295295
},
296-
|(_, ty)| &ty.chunking_type,
296+
|(_, ty, _)| &ty.chunking_type,
297297
);
298298
let module = node;
299299
if !ty.is_parallel() {
@@ -350,28 +350,30 @@ pub async fn compute_module_batches(
350350

351351
// Walk the module graph and mark all modules that are boundary modules (referenced from a
352352
// different chunk group bitmap)
353-
module_graph.traverse_all_edges_unordered(|(parent, ty, _), node| {
354-
let std::collections::hash_set::Entry::Vacant(entry) =
355-
pre_batches.boundary_modules.entry(node)
356-
else {
357-
// Already a boundary module, can skip check
358-
return Ok(());
359-
};
360-
if ty.chunking_type.is_parallel() {
361-
let parent_chunk_groups = chunk_group_info
362-
.module_chunk_groups
363-
.get(&parent)
364-
.context("all modules need to have chunk group info")?;
365-
let chunk_groups = chunk_group_info
366-
.module_chunk_groups
367-
.get(&node)
368-
.context("all modules need to have chunk group info")?;
369-
if parent_chunk_groups != chunk_groups {
370-
// This is a boundary module
353+
module_graph.traverse_all_edges_unordered(|parent, node| {
354+
if let Some((parent, ty, _)) = parent {
355+
let std::collections::hash_set::Entry::Vacant(entry) =
356+
pre_batches.boundary_modules.entry(node)
357+
else {
358+
// Already a boundary module, can skip check
359+
return Ok(());
360+
};
361+
if ty.chunking_type.is_parallel() {
362+
let parent_chunk_groups = chunk_group_info
363+
.module_chunk_groups
364+
.get(&parent)
365+
.context("all modules need to have chunk group info")?;
366+
let chunk_groups = chunk_group_info
367+
.module_chunk_groups
368+
.get(&node)
369+
.context("all modules need to have chunk group info")?;
370+
if parent_chunk_groups != chunk_groups {
371+
// This is a boundary module
372+
entry.insert();
373+
}
374+
} else {
371375
entry.insert();
372376
}
373-
} else {
374-
entry.insert();
375377
}
376378
Ok(())
377379
})?;

‎turbopack/crates/turbopack/src/global_module_ids.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,14 +31,14 @@ pub async fn get_global_module_id_strategy(
3131
// And additionally, all the modules that are inserted by chunking (i.e. async loaders)
3232
let mut async_idents = vec![];
3333
module_graph.traverse_all_edges_unordered(|parent, current| {
34-
if let (
34+
if let Some((
3535
_,
3636
&RefData {
3737
chunking_type: ChunkingType::Async,
3838
..
3939
},
4040
_,
41-
) = parent
41+
)) = parent
4242
{
4343
let module = ResolvedVc::try_sidecast::<Box<dyn ChunkableModule>>(current)
4444
.context("expected chunkable module for async reference")?;

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