@@ -260,18 +260,6 @@ class t_rr_graph_storage {
260260 return std::nullopt ; // Return an empty optional if key is not found
261261 }
262262
263- /* * @brief Find the twist number that RR node uses to change ptc number across the same track.
264- * By default this number is zero, meaning that ptc number across the same track should be the same.
265- * This number is only meaningful for CHANX/CHANY nodes, not the other nodes.
266- */
267- short node_ptc_twist (RRNodeId id) const {
268- // check whether node_ptc_twist_incr has been allocated
269- if (node_ptc_twist_incr_.empty ()){
270- return 0 ;
271- }
272- return node_ptc_twist_incr_[id];
273- }
274-
275263 /* *
276264 * @brief Returns the node ID of the virtual sink for the specified clock network name.
277265 *
@@ -525,7 +513,6 @@ class t_rr_graph_storage {
525513 node_ptc_.reserve (node_storage_.capacity ());
526514 node_ptc_.resize (node_storage_.size ());
527515 node_layer_.resize (node_storage_.size ());
528- node_ptc_twist_incr_.resize (node_storage_.size ());
529516 node_bend_start_.resize (node_storage_.size ());
530517 node_bend_end_.resize (node_storage_.size ());
531518 }
@@ -552,11 +539,6 @@ class t_rr_graph_storage {
552539 node_bend_end_.resize (size);
553540 }
554541
555- /* * @brief We only allocate the ptc twist increment array while building tileable rr-graphs */
556- void resize_ptc_twist_incr (size_t size){
557- node_ptc_twist_incr_.resize (size);
558- }
559-
560542 /* * @brief Number of RR nodes that can be accessed. */
561543 size_t size () const {
562544 return node_storage_.size ();
@@ -580,7 +562,6 @@ class t_rr_graph_storage {
580562 node_bend_end_.clear ();
581563 node_name_.clear ();
582564 virtual_clock_network_root_idx_.clear ();
583- node_ptc_twist_incr_.clear ();
584565 edge_src_node_.clear ();
585566 edge_dest_node_.clear ();
586567 edge_switch_.clear ();
@@ -616,7 +597,7 @@ class t_rr_graph_storage {
616597 node_layer_.shrink_to_fit ();
617598 node_bend_start_.shrink_to_fit ();
618599 node_bend_end_.shrink_to_fit ();
619- node_ptc_twist_incr_. shrink_to_fit ();
600+
620601 edge_src_node_.shrink_to_fit ();
621602 edge_dest_node_.shrink_to_fit ();
622603 edge_switch_.shrink_to_fit ();
@@ -654,7 +635,6 @@ class t_rr_graph_storage {
654635 void set_node_name (RRNodeId id, const std::string& new_name);
655636 void set_node_coordinates (RRNodeId id, short x1, short y1, short x2, short y2);
656637 void set_node_layer (RRNodeId id, short layer);
657- void set_node_ptc_twist_incr (RRNodeId id, short twist);
658638 void set_node_cost_index (RRNodeId, RRIndexedDataId new_cost_index);
659639 void set_node_bend_start (RRNodeId id, size_t bend_start);
660640 void set_node_bend_end (RRNodeId id, size_t bend_end);
@@ -909,15 +889,6 @@ class t_rr_graph_storage {
909889 */
910890 std::unordered_map<std::string, RRNodeId> virtual_clock_network_root_idx_;
911891
912- /* * @brief
913- *Twist Increment number is defined for CHANX/CHANY nodes; it is useful for layout of tileable FPGAs used by openFPGA.
914- *It gives us a new track index in each tile a longer wire crosses, which enables us to make long wires with a repeated single-tile pattern that "twists" the wires as they cross the tile.
915- *For example, an L4 wire would change tracks 4 times with metal shorts [e.g. 0, 2, 4, 6] and track 6 would drive a switch -- together this implements an L4 wire with only one layout tile.
916- * Twist increment number is only meaningful for CHANX and CHANY nodes; it is 0 for other node types.
917- * We also don't bother allocating this storage if the FPGA is not specified to be tileable; instead in that case the twist for all nodes will always be returned as 0.
918- */
919- vtr::vector<RRNodeId, short > node_ptc_twist_incr_;
920-
921892 /* * @brief Edge storage */
922893 vtr::vector<RREdgeId, RRNodeId> edge_src_node_;
923894 vtr::vector<RREdgeId, RRNodeId> edge_dest_node_;
@@ -999,7 +970,6 @@ class t_rr_graph_view {
999970 const vtr::array_view_id<RRNodeId, const t_edge_size> node_fan_in,
1000971 const vtr::array_view_id<RRNodeId, const short > node_layer,
1001972 const std::unordered_map<RRNodeId, std::string>& node_name,
1002- const vtr::array_view_id<RRNodeId, const short > node_ptc_twist_incr,
1003973 const vtr::array_view_id<RREdgeId, const RRNodeId> edge_src_node,
1004974 const vtr::array_view_id<RREdgeId, const RRNodeId> edge_dest_node,
1005975 const vtr::array_view_id<RREdgeId, const short > edge_switch,
@@ -1012,7 +982,6 @@ class t_rr_graph_view {
1012982 , node_fan_in_(node_fan_in)
1013983 , node_layer_(node_layer)
1014984 , node_name_(node_name)
1015- , node_ptc_twist_incr_(node_ptc_twist_incr)
1016985 , edge_src_node_(edge_src_node)
1017986 , edge_dest_node_(edge_dest_node)
1018987 , edge_switch_(edge_switch)
@@ -1105,20 +1074,6 @@ class t_rr_graph_view {
11051074 return std::nullopt ; // Return an empty optional if key is not found
11061075 }
11071076
1108- /* *
1109- * @brief Retrieve the twist number (if available) that the given RRNodeId used for its PTC number.
1110- *
1111- * @param id The RRNodeId for which to retrieve the twist number.
1112- * @return The twist number used for the PTC number, or a default value if not available.
1113- */
1114- short node_ptc_twist_incr (RRNodeId id) const {
1115- // check if ptc twist increment allocated
1116- if (node_ptc_twist_incr_.empty ()){
1117- return 0 ; // if it is not allocated we just assume that is zero
1118- }
1119- return node_ptc_twist_incr_[id];
1120- }
1121-
11221077 /* *
11231078 * @brief Prefetches hot RR node data required for optimization.
11241079 *
@@ -1233,7 +1188,6 @@ class t_rr_graph_view {
12331188 vtr::array_view_id<RRNodeId, const t_edge_size> node_fan_in_;
12341189 vtr::array_view_id<RRNodeId, const short > node_layer_;
12351190 const std::unordered_map<RRNodeId, std::string>& node_name_;
1236- vtr::array_view_id<RRNodeId, const short > node_ptc_twist_incr_;
12371191 vtr::array_view_id<RREdgeId, const RRNodeId> edge_src_node_;
12381192 vtr::array_view_id<RREdgeId, const RRNodeId> edge_dest_node_;
12391193 vtr::array_view_id<RREdgeId, const short > edge_switch_;
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