dts: bindings: usb: Specify fifo sizes in devicetree

Add g-rx-fifo-size, g-np-tx-fifo-size and g-tx-fifo-size required
properties to snps,dwc2 compatible. Property names are the same as used
in Linux because Zephyr aims for devicetree source compatibility with
other operating systems.

Specifying fifo sizes in devicetree greatly reduces necessary driver
complexity and allows application developer to adjust the sizes if
necessary to best utilize underlying hardware.

Signed-off-by: Tomasz Moń <[email protected]>

Author: tmon-nordic

dts/arm/intel_socfpga_std/socfpga.dtsi

@@ -238,6 +238,11 @@
 			ghwcfg1 = <0x00000000>;
 			ghwcfg2 = <0x208ffc90>;
 			ghwcfg4 = <0xfe0f0020>;
+			/* 8064 locations with full flexibility */
+			g-rx-fifo-size = <608>;
+			g-np-tx-fifo-size = <32>;
+			g-tx-fifo-size = <512 512 512 512 512 512 512 512
+					  512 512 512 512 512 512 256>;
 			status = "disabled";
 		};
 
@@ -251,6 +256,11 @@
 			ghwcfg1 = <0x00000000>;
 			ghwcfg2 = <0x208ffc90>;
 			ghwcfg4 = <0xfe0f0020>;
+			/* 8064 locations with full flexibility */
+			g-rx-fifo-size = <608>;
+			g-np-tx-fifo-size = <32>;
+			g-tx-fifo-size = <512 512 512 512 512 512 512 512
+					  512 512 512 512 512 512 256>;
 			status = "okay";
 		};
 

dts/bindings/usb/snps,dwc2.yaml

@@ -51,3 +51,22 @@ properties:
     description: |
       Value of the GHWCFG4 register. It is used to determine available endpoint
       types during driver pre-initialization.
+
+  g-rx-fifo-size:
+    type: int
+    required: true
+    description: |
+      Rx Data FIFO Depth. Must not exceed GRXFSIZ.RxFDep power-on value.
+
+  g-np-tx-fifo-size:
+    type: int
+    required: true
+    description: |
+      IN Endpoint 0 FIFO Depth. Must not exceed GNPTXFSIZ.NPTXFDep power-on value.
+
+  g-tx-fifo-size:
+    type: array
+    required: true
+    description: |
+      IN Endpoint Transmit fifo depths. Values must not exceed their respective
+      DIEPTXFn.INEPnTxFDep power-on values.

dts/vendor/nordic/nrf54h20.dtsi

@@ -638,6 +638,16 @@
 				ghwcfg1 = <0xaa555000>;
 				ghwcfg2 = <0x22abfc72>;
 				ghwcfg4 = <0x1e10aa60>;
+				/* 3050 locations available, GRXFSIZ is 548,
+				 * GNPTXFSIZ and DIEPTXFn are 512. The default
+				 * values (upper bounds) sum up above the limit.
+				 * Allow High-Bandwidth only on TxFIFO 1 and 2.
+				 * Use maximum possible for RxFIFO and allocate
+				 * everything remaining for TxFIFO 0.
+				 */
+				g-rx-fifo-size = <548>;
+				g-np-tx-fifo-size = <198>;
+				g-tx-fifo-size = <512 512 256 256 256 256 256>;
 				status = "disabled";
 			};
 

dts/vendor/nordic/nrf54lm20a.dtsi

@@ -232,6 +232,11 @@
 				ghwcfg1 = <0x0>;
 				ghwcfg2 = <0x22affc52>;
 				ghwcfg4 = <0x3e10aa60>;
+				/* 3040 locations with full flexibility */
+				g-rx-fifo-size = <592>;
+				g-np-tx-fifo-size = <32>;
+				g-tx-fifo-size = <512 256 256 256 256 256 256 256
+						  16 16 16 16 16 16 16>;
 				status = "disabled";
 			};
 

dts/vendor/nordic/nrf9280.dtsi

@@ -397,6 +397,16 @@
 				ghwcfg1 = <0xaa555000>;
 				ghwcfg2 = <0x22abfc72>;
 				ghwcfg4 = <0x1e10aa60>;
+				/* 3050 locations available, GRXFSIZ is 548,
+				 * GNPTXFSIZ and DIEPTXFn are 512. The default
+				 * values (upper bounds) sum up above the limit.
+				 * Allow High-Bandwidth only on TxFIFO 1 and 2.
+				 * Use maximum possible for RxFIFO and allocate
+				 * everything remaining for TxFIFO 0.
+				 */
+				g-rx-fifo-size = <548>;
+				g-np-tx-fifo-size = <198>;
+				g-tx-fifo-size = <512 512 256 256 256 256 256>;
 				status = "disabled";
 			};
 

dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi

@@ -422,6 +422,9 @@
 			ghwcfg1 = <0x00000000>;
 			ghwcfg2 = <0x224dd930>;
 			ghwcfg4 = <0xd3f0a030>;
+			g-rx-fifo-size = <64>;
+			g-np-tx-fifo-size = <32>;
+			g-tx-fifo-size = <40 40 40 40>;
 		};
 
 		timer0: counter@6001f000 {