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EldritchJS/README.md

Jason Schlessman

Senior Principal Software Engineer at Red Hat, on the Open Accelerator Team. I build and harden OpenShift clusters for research computing at the Mass Open Cloud.

Now

  • Compliance-ready OpenShift. FIPS 140-3, NIST SP 800-171 (scanned as the NIST 800-53 Moderate baseline) and the HIPAA Security Rule, delivered as Helm charts and GitOps in CCI-MOC/oac-apps. On the reference cluster, node compliance-scan failures went from 377 to 0, and nine charts reproduce that cluster.
  • FIPS container images. Rebuilt the Pure Storage COSI driver and the upstream COSI controller and sidecar on Red Hat toolchains so their crypto runs through RHEL's validated OpenSSL (CCI-MOC/pure-cosi).
  • GPU infrastructure. H100 clusters on OpenShift, GPU passthrough to VMs, multi-tenant isolation testing, and NCCL and RDMA/RoCE benchmarking.

Before

  • Image forensics at Red Hat Research: pyIFD, a Python toolkit for image forgery detection.
  • ML on OpenShift: adversarial example generation and retraining pipelines, NLP over CORD-19.
  • Embedded and FPGA: ESP32, STM32 and RISC-V soft cores. esp32-gdb-mqtt is a wireless GDB server over MQTT.

Tools: OpenShift, Kubernetes, Helm, Argo CD, Advanced Cluster Management, Compliance Operator, ACS, KubeVirt, Python, Go, C.

LinkedIn

Pinned Loading

  1. CCI-MOC/oac-apps CCI-MOC/oac-apps Public

    Cluster configuration for the Open Accelerator environment

    Go Template 1 11

  2. oac-eldritch-things oac-eldritch-things Public

    Compliance and dual-modality GPU work on OpenShift clusters at the compute center

    Shell 2

  3. CCI-MOC/pure-cosi CCI-MOC/pure-cosi Public

    COSI driver for everpure flashblade

    Python 3

  4. ml-dev-env ml-dev-env Public

    Tooling for an H100 GPU cluster on OpenShift: NCCL benchmarks, RDMA/GPUDirect tests, NIC firmware

    Shell

  5. pyIFD pyIFD Public

    Python toolkit for image forgery detection (Red Hat Research)

    Python 24 5

  6. esp32-gdb-mqtt esp32-gdb-mqtt Public

    Wireless GDB debug server on an ESP32-C3 over MQTT, for RISC-V soft cores on FPGAs

    C