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The lifetime of temporaries used to initialize a loop condition variable
needs to be extended to the end of each iteration. Example:
```c++
ConvertibleToBool get_ctb();
while(ConvertibleToBool const& cond = get_ctb()) {
...
} // destroy temporary here, then reevaluate
```
Capture the destructor cleanups so temporary lifetimes get extended.
Assisted-By: Claude Opus 5.5 <noreply@anthropic.com>
This allows reusing the same logic in other workflows, and most importantly it will allow separating concerns (such as API keys) by making them accessible only to the workflow that needs to submit to LNT, not the workflows that produce the benchmark data.
Emit code for statements after a co_return in a new block, which may be reachable through a label. Unlike classic codegen, this patch still keeps unreachable code alive through flattening to stay closer to the source code, though this could still be changed. --------- Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
This commit fixes bugs that were identified in #227975. The core reason is that the existing code does not perform checks on wether it is safe to move `dealloc`, and would blindly do a `deallocOp->moveAfter(lastUser)`. We have to check that where we move it to is: - After all the operand definitions that the `dealloc` uses - Before any of ops that consume the results produced by the `dealloc` This is what the `findValidInsertionPoint` method does. AI disclosure: assistance from copilot to navigate code base, and plan out the code. Was still written by me.
…ount (#231100) fixes #231062 which affects loops with constant bounds where the `step` and `upper bound - lower bound` are very close and by "close" the `upper bound - lower bound` exceeds step by less than about half a float32 ulp at that magnitude. eg: `ub - lb`: 20000001, `step`: 20000000 `ub - lb`: 1099511693312, `step`: 1099511627776 removing the float conversation and hence the ceil operation and comparing `*ubInt - *lbInt <= *stepInt` with repro as a test.
Use `DefaultReallocationInterface` as the concrete model for `memref.realloc` so it gets the default `HoistingKind::None`. The current parameter selects `DefaultAllocationInterface` and incorrectly enables `Loop | Block` hoisting. Assisted-by: Codex
Follow up of #231865. This PR move `sched_setparam` behind the centralized syscall wrappers, following `libc/docs/dev/syscall_wrapper_refactor.md`.
F2023 16.1 p5 classifies `MOVE_ALLOC` as simple when its `FROM` argument is not a coarray, and no other standard intrinsic subroutine is pure or simple. Mark a `MOVE_ALLOC` call `SIMPLE` and `PURE` only when `FROM` is not a coarray. A call with a coarray `FROM` in a pure subprogram or `DO CONCURRENT` is now also reported as a reference to an impure procedure. Update `F202X.md` and add a test. Part of #221457.
…232016) gfx950 v_pk_add/mul/fma_f32 for certain op_sel combinations: - Case 1 (v_pk_add/mul_f32): src0/src1 both VGPR with op_sel[1:0] == 2'b10. Adjusted in GCNHazardRecognizer::fixPkF32InvalidOpSel by commuting src0/src1 in place. - Case 2/3 (v_pk_fma_f32): op_sel[2:1] == 2'b01, 2'b10, or 2'b11. Fixed via SIInstrInfo::decomposePkFMAF32, which splits the packed FMA into two independent scalar v_fma_f32s; wired in from both SITargetLowering::AdjustInstrPostInstrSelection (SelectionDAG) and AMDGPUInstructionSelector::select's G_FMA case (GlobalISel), both gated on SIInstrInfo::isLegalPkFMAF32OpSel. A safety net that crashes the compiler is added in GCNHazardRecognizer::fixPkF32InvalidOpSel. Also reject the invalid op_sel encodings directly in the assembler (AMDGPUAsmParser::validateOpSel) so hand-written/inline asm can't encode them. To address the ASAN issue, the decomposition in SDAG is relocated from SIInstrInfo::legalizeOperandsVOP3 to SITargetLowering::AdjustInstrPostInstrSelection.
Clarify the documentation of `HasParallelRegion`. The presence of the trait means that the op may have parallel semantics. This trait could be turned into an op interface in the future. Also add the trait to some operations where it was missing. Assisted-by: Codex
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…232155) This allows sharing the logic for validating the LNT machines definition between the libc++ and the libstdc++ benchmarking jobs. As part of that, I noticed that these jobs only used a subset of the fields in machines.json, so this PR regroups them into a sub-entry. There are now two aspects in machines.json: "when" we measure something, and "how" we measure something, and both are sub-objects.
…2088) addOrcRTLiteSupport created its helper module without a triple. An empty triple defaults to ELF, so since #228429 (AsmPrinter reads the triple from the Module, not the TargetMachine) the AArch64 AsmPrinter took its ELF path on Mach-O hosts and called through a null AArch64TargetStreamer. Use the ExecutionSession's triple. rdar://189983111 Co-authored by: Claude Sonnet 5.5
…tions (#230393) Rename the PowerPC CodeGen options so that they start with ppc-, and turn the -disable-* options into positive options with the default flipped. -enable-ppc-gen-scalar-mass becomes -ppc-scalar-mass and -disable-ppc-ctrloops becomes -ppc-ctr-loops, since -ppc-gen-scalar-mass and -ppc-ctrloops are pass names. Preparatory for migrating to LibraryOptions. Aided by Opus 5.5
…nners (#232151) Homebrew stops providing unversionned commands like `python3` in their versionned formulae (`python@3.14`) whenever it stops being the default. As a result, the `python3` symlink moved from `<...>/bin` to `<...>/libexec/bin` when the Python 3.15 formula was introduced, displacing Python 3.14. As a result, the macOS jobs started falling back to the system Python 3.9. Since llvm-lnt does not support Python 3.9 (which is EOL'd), that failed the macOS benchmarking jobs (see for example [1]). Fix this by adding <...>/libexec/bin to the path instead of just <...>/bin. [1]: https://github.com/llvm/llvm-project/actions/runs/38039547247/job/114176935620
At -O0 the order of a function's entry-block allocas is its stack frame layout. CIR now creates the return value's alloca before the parameters', and keeps hoisted block-scope allocas after the function's own, matching classic codegen. CIRGen creates `__retval` before the parameters, as classic's StartFunction does, and the implicit `return 0` store for `main` moves into emitFunctionProlog, where classic emits it. HoistAllocas places each hoisted alloca after the allocas already at the start of the destination block instead of in front of them. Assisted-by: Cursor / claude-opus-5.5 --------- Co-authored-by: Andy Kaylor <akaylor@nvidia.com>
Each shipped library set its PUBLIC and PRIVATE link libraries in separate target_link_libraries calls. Use one call per library.
Support bool-returning `await_suspend` in ClangIR: - Add an optional boolean condition operand to `cir.coro.suspend_point` to signal whether suspension takes effect or is vetoed. - In CIRGen, evaluate the `await_suspend` expression as boolean when `SuspendReturnType::SuspendBool` and pass the condition to `cir.coro.suspend_point`. - Update control flow and successor regions for `cir.await` accordingly. - Add MLIR and CodeGen test coverage. Closes #227404
…ets (#227985) **Issue:** In `amdgpu-sw-lower-lds` pass: - LDS is moved/lowered into an `__asan_malloc_impl` buffer. AS3 pointers hold offsets into it, and each LDS access is rewritten to `buf + offset`. - LDS to flat casts produce `buf + offset`. Casting that back to AS3 kept the full address, so the next access went out of bounds. **Fix:** - Collect flat to LDS casts and rewrite them as `inttoptr(trunc(ptrtoaddr(flat) - ptrtoaddr(buf)))` to get the offset back. The existing translation handles the users. - Covers kernels and already-lowered non-kernels. **Note :** - Non-kernels that only take a flat pointer are handled in a follow-up #228043. Assisted by: claude opus 5.5
Constant-evaluated calls to __builtin_object_size and __builtin_dynamic_object_size may have a second argument that cannot be evaluated. The legacy evaluator incorrectly assumed it was a known constant integer, which could trigger an assertion. Evaluate the argument through the current evaluator and propagate evaluation failures instead of calling EvaluateKnownConstInt. Add regression coverage for division by zero, function calls, runtime parameters, volatile reads, and null pointer dereferences. The tests cover both object-size builtins and both constant evaluators. AI assistance was used to generate additional regression test cases, which I reviewed and adapted. Fixes #231108 --------- Co-authored-by: Timm Baeder <tbaeder@redhat.com>
…nodes. (#231609) The cost of the vxrm write makes using these instruction not profitable on 525.x264_r on current SiFive OoO cores.
…t split (#225440) **Summary**: - Flang `lower-workdistribute` pass splits an `omp.target` that contains a `workdistribute` into an `omp.target_data { omp.target }` nest, cloning every `omp.map.info` for the inner target. - A Fortran allocatable/pointer is mapped as two linked maps: a descriptor map whose `members` operand points at its data map. - The old clone copied `members` verbatim, so the inner descriptor clone still referenced the outer/original data map instead of its inner sibling. - **Fix**: Clone with an `IRMapping` so `members` operands are retargeted to the inner clones, and clone in dependency order. - Add a regression test exercising an allocatable descriptor/data member pair. Assisted by: claude opus 4.8
The sub-register, super-register and register unit lists of each register were built one element at a time, although their sizes are known in advance. AMDGPU has about 20000 registers, so there were a lot of realloc calls. Generating AMDGPUGenRegisterInfo.inc executes 0.4% fewer instructions with 4% fewer page faults. This greatly reduces the time impact with MALLOC_PERTURB_=1. Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Add the OpenACCToLLVM lowering of acc.kernel_environment together with the gpu.launch_func operations it contains. The environment maps its data operands in an implicit data region around its launches. The entry call writes the device address of each already mapped operand back, and every launch passes that address to the kernel as a device pointer. Each gpu.launch_func becomes a call to the runtime that launches the kernel, using the async and wait clauses of the environment and sharing its argument encoding with the data directive lowering. --------- Co-authored-by: Matsu <kmatsumura@nvidia.com>
This reverts commit 99690a3. This commit broke lldb-defines.h. The version defines are never filled in because the unifdef copy_command overrides calling the version-header-fix script. This does mean that you can't remove any SWIG preprocessor macros from lldb-defines right now, but there are none currently.
VPVectorEndPointerRecipe only computes an address, mark accordingly. Also update narrowInterleaveGroups to bail out on reverse interleave groups explicitly, instead of relying on VectorEndPointer being treated as writing memory.
…229648) An ImportDecl reached the "declaration of kind" NYI error, so a translation unit importing a Clang header module or a C++20 named module failed under -fclangir. Mirror classic CodeGen's handling of Decl::Import: record the imported module once; for a C++20 named module under the Itanium ABI stop there, since the module has its own initializer function; otherwise emit the module initializers of the header module and of its implicit submodules into the importing translation unit, each module once. The CXX20ModuleInits flag of classic CodeGen becomes the member cxx20ModuleInits, which release() also uses when naming the named-module initializer. Call the initializers of the imported C++20 named modules. CIRGen records their mangled names as the module attribute cir.cxx_module_imported_inits, with classic CodeGen's selection: for an interface or partition unit the modules it exports, imports, or imports in its global or private module fragment, otherwise the modules the unit imported; header-like modules and modules that need no initializer are skipped. LoweringPrepare declares those functions and calls them before the unit's own initializers. The initializer of an interface unit runs once behind an internal guard byte, `<name>__in_chrg`, and is emitted even with nothing to run, as in classic CodeGen; the guard check of the TLS init function is shared for this. Autolink metadata for imported modules and debug info for import declarations stay missing features. The test covers a header module imported twice, an importing unit, an interface unit with a dynamic initializer, one whose only initializer is an imported module's, and one with nothing to run, comparing the LLVM IR with classic CodeGen. Assisted-by: Claude Fable 5.1 (Claude Code)
…tore stub (#232453) The RESTORE_DEALLOC_RET_JMP_V4 pseudos already define PC, so copying all of the return's implicit operands added a second, dead PC def. This avoids failing a future verifier rule. Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
This fixes 1e8b3f4 (#232382). Buildkite error link: https://buildkite.com/llvm-project/upstream-bazel/builds?commit=1e8b3f482644caeb4fd02be0dbdaa1c201c09812 Co-authored-by: Google Bazel Bot <google-bazel-bot@google.com>
For AMDGCN flavoured SPIR-V we disable optimisations on SPIR-V IR, to prevent introducing changes that are detrimental to the subsequent lowering to AMDGPU. However, this can lead to fairly voluminous binaries, in extreme cases. This patch adds a minimal set of size optimising passes that *should* be safe to run. They execute for `spirv64-amd-amdhsa` codegen when passing the dedicated `-fenable-spirv-size-optimization` flag, for optimisation levels greater than `O0`.
…5808)" (#232505) This reverts commit 0de93f3. It breaks CodeGen/NVPTX/i16x2-instructions.ll on main. The new test_smulh and test_umulh CHECK lines were generated before #232309 (3db057a), which stopped emitting unused argument registers at -O0, so they still expect '.reg .b32 %r<3>;'. See #225808 (comment) The change can reland with those two functions' CHECK lines regenerated. 🤖 Generated with [Claude Code](https://claude.com/claude-code)
…#219733) Fix a few isel patterns regarding register size by inserting vgpr32_lo16 and lo16_to_vgpr32 helper in true16 mode. For extract_subreg, add explicit types. This patch address "v_cmp_class_f16"
Currently we will either use the mask vector type if it's big enough to fit the elements, or promote the element width to the scalar operand type. In the latter case we will end up with a vector element type larger than strictly necessary, which means a v32i1 mask will get promoted to v32i64 on RISC-V, which isn't a legal type, and expansion fails. We can use a legal vector type that's just small enough via getLegalMaskAndStepVector, which is already used by expandVectorFindLastActive, expandCttzElts etc. This fixes crashes on RISC-V and also uses a more compact step vector. It also means we can handle scalable vectors. We need to move the function into TargetLowering.cpp to use the getLegalMaskAndStepVector, but this brings it inline with the other expansions.
Nested acc.kernel_environment is not supported and thus it is now explicitly made illegal. Follow-up to comment: #232382 (comment)
…232489) Add tests where LV reorders diff-checked accesses through interleave groups, which is incorrect
This adds testing for basic arithmetic with SVE vector types. The test is a direct port from a classic codegen test of the same name. We currently have a problem with vector splat cast handling, so I had to remove some test cases. I will fix the vector splat case and add the remaining test cases in a follow-up PR. Test check updates assisted by Cursor.
The test is now split in two. TestDAP_runInTerminal and TestDAP_runInTerminal_launcher. the runInTerminal test uses a shared build Add the lldb_dap_exe property to handle the check in one place.
The 32-bit LOAD_STACK_GUARD expansion defines the full 64-bit register with an implicit-def, so the explicit 32-bit sub-register def is not dead. If you were to run LiveVariables on this, it would strip the dead flags. Avoids failing a future verifier check. Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
InlineFunction creates alias.scope/noalias metadata to represent the set of `noalias` arguments to a function. We don't need the `!noalias` metadata in many cases (mostly the ones where there aren't other objects we need to be `!noalias` with) now that we have the ability to use disjoint scopes, saving us IR size and metadata bloat. --------- Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
On some platforms ctx is set to NULL when delivering a signal; this causes a crash when trying to memcpy the contents into __tsan::SignalDesc. This patch first performs a NULL-check before performing the memcpy in order to avoid the crash. rdar://168547411
Clang now supports lowering .cir cc1 input to LLVM IR, assembly, and objects. The lowering does not execute the cir-to-cir passes; it only translates the input CIR to LLVM IR, assembly, and objects. This assumes that the input CIR is well-formed and valid and emitted the way -emit-cir emits this today. There will be some future PR that enables emission earlier and allows the pipeline to apply CIR passes before lowering to LLVM IR, assembly, and objects.
`insertForcedWaitAfter()` currently passes the raw successor of an always-GDS instruction to `generateWaitcnt()`. When a `DBG_LABEL` appears before a following `V_INTERP`, the pass no longer recognizes that successor as `V_INTERP`. It consequently emits `expcnt(0)` in a separate wait and leaves the VINTERP `waitexp` operand unchanged. Use `next_nodbg()` to find the next non-debug instruction. The MIR regression test contains matched debug and no-debug variants and verifies that both merge the EXP wait into `V_INTERP` while retaining only the required LGKM wait.
Stealing a heap allocation resets the source capacity to zero because SmallVectorImpl does not know the inline element count. Reusing the source then allocates even when its inline storage would suffice. Restore the inline capacity in same-type SmallVector move construction and assignment, where the element count is known. Assisted-by: Codex
…232519) The legacy cost model may decide to scalarize instructions if profitable which get lowered to VPReplicateRecipes. In some cases, VPlan transformations may optimize those recipes, in which case the legacy reasoning does no longer apply to them, e.g. because we converted a truncate of an induction to a truncate of the canonical IV. Only apply legacy costs in precomputeCosts to replicate recipes.
…2510) CIRToLLVMSwitchFlatOpLowering forwarded the raw CIR successor operands into the new llvm.switch while the destination block arguments had been type-converted, so any forwarded successor operand failed verification with 'type mismatch for bb argument'. No CIR type is also an LLVM type, so every operand was affected. This forwards adaptor.getDefaultOperands()/adaptor.getCaseOperands() like the br lowering does.
Runtime JIT reads flags like -O3 from the embedded command line, so it compiles HIP SPIR-V always at -O0 without it
The x86 pmulh intrinsics were removed in #227663, so CIR hit NYI on these builtins
CIRGenBuilderTy carries two StringMaps by value (record name and global versioning maps), which grow to tens of thousands of entries over a translation unit. getVTableComponent copied the builder on every call, deep-copying both maps per vtable component: quadratic work that cost ~12.5s while selfhosting clang/unittests/AST/ASTImporterTest.cpp. Take the builder by reference instead, matching every other call site. Also take it by reference in genVscaleTimesFactor, the only other by-value use. ASTImporterTest -fclangir wall time goes from 87.4s to 75.0s; output is unchanged.
…32522) #232131 implemented cold-to-optsize (plus minsize/naked/noduplicate and user optnone) in setCIRFunctionAttributesForDefinition. Pin the optimization-level interplay its tests do not cover: a cold definition gets optsize at -O2 but not at -O0, minsize keeps optsize on at -O0 by suppressing the O0-implies-optnone default, optnone suppresses optsize, and declarations and call sites carry cold alone. Assisted-by: Muse Code (Muse).
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