Use single LR/SC flag per tile. #53
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…a flag per cacheline. Passed the lrsc_test.c
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Instead of having a flag per cacheline, change to use a single lrsc flag per tile in L1.5. Passed the lrsc_test.c.
In this case, we only support one outstanding LR/SC transaction per tile.
Example:
LR addr1;
LR addr2; // overwrite the state of the first LR
SC addr2; // succeed
SC addr1; // fail
We also need to make sure that different threads in one tile will not LR/SC at the same address at the same time.