[comgr][hotswap] Cache promotion SGPR continuation proofs

[harsh-amd]

Scope

Cache repeated promotion continuation and liveness proofs while preserving the monotone fail-closed result.

Clean review range

• Clean fork PR: [comgr][hotswap] Cache promotion SGPR continuation proofs harsh-amd/llvm-project#11
• Exact [comgr][hotswap] Close remaining offline corpus gaps #3598 source commit(s): f3dc2b1
• Depends on robust routing.

Review status

Draft for early review. GitHub cannot base an upstream ROCm PR on a branch in the fork, so the Files changed view is temporarily cumulative with unmerged prerequisites. Review the clean fork PR and exact source commits linked above. This branch will be rebased and reduced after dependencies land; do not merge the cumulative snapshot.

#3598 remains unchanged as the immutable 2,685/2,685 integration reference.

Validation provenance

The source commits are exact ancestors of corpus-tested ab3cdd6. The cumulative integration passed 2,685/2,685 corpus paths, 213/213 HotswapMCTests, and COMGR lit with 168 passed, 14 unsupported, and 0 failed. Standalone current-staging formatting, focused tests, CI, and the appropriate corpus transition gate are required before this draft becomes ready.

[paulzzy]

I found two blocking issues in the current head 047e57c90c2c.

1. The promotion cache proves SGPR liveness from stale Ctx.Decoded, while the promotion path separately decodes and copies the current bytes from Ctx.Text. Earlier HotSwap passes mutate Ctx.Text before assignLongBranchGateways, so this can select a scratch pair using an instruction stream different from the one actually relocated. The current-text decode plus mutation generation introduced by #3618 needs to be a semantic prerequisite; promotion should consume that API rather than retain a second BatchedSgprContinuationAnalysis over the original snapshot.

2. The analysis has no memory budget or fail-closed size cap. At 106 SGPRs the packed use/def/unsafe rows alone are 48 bytes per instruction, and the cached unsafe rows retain 16 bytes per instruction. Worklists, bitvectors, two per-instruction SmallVector arrays, and edge allocations put the actual cost well above 100 bytes per instruction. The existing randomized test uses ten instructions and does not exercise the large-function case this corpus work targets.

There are also reviewability/build blockers in the live stack:

• da2e34200f8c rewrites hundreds of unrelated lines across DS2, routing, and old tests. Please drop it and reconstruct only the focused semantic fixes; preserve its empty-SGPR guard/test.
• The head still contains the structured-binding capture in the promotion lambda, which is a C++20 extension in COMGR's C++17 build.
• The hotswap-trampoline-live-vcc-deferred.s output change belongs to the robust-routing prerequisite, not a semantics-preserving cache PR.

Recommended shape: land the corrected #3618 foundation, rebase robust routing onto it, and make this PR a small promotion consumer of #3618's current-text liveness/replacement-bit APIs. Add same-range mutation invalidation, malformed-boundary/opaque-exit, below-budget/threshold+1, and promotion-heavy wall-time/peak-RSS coverage, then show corpus output/hash/idempotence equivalence.