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3c22477
Add Zbs single-bit operations implementation (RV32, SystemVerilog)
jeff-7 Mar 3, 2026
1804796
Ignore macOS .DS_Store
jeff-7 Mar 3, 2026
38ffa5d
Fix svlint style issues in Zbs
jeff-7 Mar 3, 2026
07a4556
Fix svlint issues
jeff-7 Mar 3, 2026
c627fe2
Fix final svlint whitespace issues
jeff-7 Mar 3, 2026
227077b
Force CI
jeff-7 Mar 3, 2026
41fd19e
Fix final svlint whitespace issues
jeff-7 Mar 3, 2026
9bcdeb1
Force CI
jeff-7 Mar 3, 2026
9c90038
Fix comma-leading and keyword spacing
jeff-7 Mar 3, 2026
533d464
Force CI
jeff-7 Mar 3, 2026
a897b44
Fix comma-leading and keyword spacing
jeff-7 Mar 3, 2026
4a918f2
Replace parameter with localparam in params.svh
jeff-7 Mar 6, 2026
adab42b
Merge branch 'main' into zbs-implementation
TheDeepestSpace Mar 22, 2026
f8678c9
Add Zbs instruction testbench with assertions and randomized tests
Dazhou-20383 Mar 15, 2026
50f5aee
Match bit width in bext comparison
Dazhou-20383 Mar 15, 2026
de0a360
Fix: Resolve svlint style violations
Dazhou-20383 Mar 15, 2026
0894e45
fix svlint infractions
TheDeepestSpace Mar 22, 2026
fae9204
Merge pull request #210 from UTOSS/zbs-testbench-fix
TheDeepestSpace Mar 23, 2026
cf2d643
Refactor zbs to use ALUM enum and Update testbench accordingly
Dazhou-20383 May 10, 2026
aa712ce
Fix: End of line svlint
Dazhou-20383 May 10, 2026
50cfcd4
fix svlint infractions
Dazhou-20383 May 10, 2026
7f292e1
fix svlint infractions
Dazhou-20383 May 10, 2026
53184be
Refactor zbs module and update testbench formatting for clarity
Dazhou-20383 Jun 1, 2026
130d06c
Merge pull request #227 from UTOSS/zbs-testbench-fix
TheDeepestSpace Jul 19, 2026
39d5c5f
Merge branch 'main' into zbs-implementation
TheDeepestSpace Jul 19, 2026
33c44a9
Include Zbs ALU decoder using the current B extension structure and F…
Dazhou-20383 Jul 22, 2026
a9f7eea
Merge zbs implementation with testbench fixes
Dazhou-20383 Jul 22, 2026
2672eaa
Rename ZBS function identifiers to ZBB in decoder module for consistency
Dazhou-20383 Jul 22, 2026
34a6019
Update zbs to match zbb and zba style and Fix lint issues
Dazhou-20383 Jul 22, 2026
2572551
Removed the zbs ALU usages to fix undefined variable
Dazhou-20383 Jul 22, 2026
fcec24e
Refactor always_comb blocks in Instruction_Decode module for svlint c…
Dazhou-20383 Jul 22, 2026
7556100
Fix lint issues
Dazhou-20383 Jul 22, 2026
17a9664
Introduce more test cases to zbs_decoder and fix lint issues
Dazhou-20383 Jul 22, 2026
0e3deee
Refactor zbs module to change reg2 type to logic [4:0] and update tes…
Dazhou-20383 Jul 22, 2026
205208b
Add b_alu_control cases for BSET, BINV, and BCLR in ext__b__decoder
Dazhou-20383 Jul 22, 2026
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1 change: 1 addition & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -31,3 +31,4 @@ out/**
!out/.gitkeep
build/**
!build/.gitkeep
.DS_Store
92 changes: 64 additions & 28 deletions src/ext/b/decoder.sv
Original file line number Diff line number Diff line change
Expand Up @@ -4,25 +4,28 @@
/* verilator lint_off DECLFILENAME */
module ext__b__decoder
/* verilator lint_on DECLFILENAME */
( input [2:0] funct3
, input [6:0] funct7
, input opcode_t opcode
( input [2:0] funct3
, input [6:0] funct7
, input opcode_t opcode
/* verilator lint_off UNUSEDSIGNAL */
, input reg_t rd
, input reg_t rd
/* verilator lint_on UNUSEDSIGNAL */
, input reg_t rs2
, input reg_t rs2
, output ext__b__types::b_alu_control_t b_alu_control
);

import ext__b__types::*;

localparam bit [6:0] FUNCT7_ZBA = 7'b0010000;
localparam bit [6:0] FUNCT7_ZBB__LOGICAL = 7'b0100000;
localparam bit [6:0] FUNCT7_ZBB__MINMAX = 7'b0000101;
localparam bit [6:0] FUNCT7_ZBB__ZEXT = 7'b0000100;
localparam bit [6:0] FUNCT7_ZBB__ROTATE = 7'b0110000;
localparam bit [6:0] FUNCT7_ZBB__ORCB = 7'b0010100;
localparam bit [6:0] FUNCT7_ZBB__REV8 = 7'b0110100;
localparam bit [6:0] FUNCT7_ZBA = 7'b0010000;
localparam bit [6:0] FUNCT7_ZBB_LOGICAL = 7'b0100000;
localparam bit [6:0] FUNCT7_ZBB_MINMAX = 7'b0000101;
localparam bit [6:0] FUNCT7_ZBB_ZEXT = 7'b0000100;
localparam bit [6:0] FUNCT7_ZBB_ROTATE = 7'b0110000;
localparam bit [6:0] FUNCT7_ZBB_ORCB = 7'b0010100;
localparam bit [6:0] FUNCT7_ZBB_REV8 = 7'b0110100;
localparam bit [6:0] FUNCT7_ZBB__BSET = 7'b0010100;
localparam bit [6:0] FUNCT7_ZBB__BCLR = 7'b0100100;
localparam bit [6:0] FUNCT7_ZBB__BINV = 7'b0110100;

always_comb
case (opcode)
Expand All @@ -36,78 +39,111 @@ module ext__b__decoder
default: b_alu_control = B_ALU_CTRL__NONE;
endcase

FUNCT7_ZBB__LOGICAL:
FUNCT7_ZBB_LOGICAL:
case (funct3)
3'b111: b_alu_control = B_ALU_CTRL__ANDN;
3'b110: b_alu_control = B_ALU_CTRL__ORN;
3'b100: b_alu_control = B_ALU_CTRL__XNOR;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase
FUNCT7_ZBB__MINMAX:

FUNCT7_ZBB_MINMAX:
case (funct3)
3'b100: b_alu_control = B_ALU_CTRL__MIN;
3'b101: b_alu_control = B_ALU_CTRL__MINU;
3'b110: b_alu_control = B_ALU_CTRL__MAX;
3'b111: b_alu_control = B_ALU_CTRL__MAXU;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase
FUNCT7_ZBB__ROTATE:

FUNCT7_ZBB_ROTATE:
case (funct3)
3'b001: b_alu_control = B_ALU_CTRL__ROL;
3'b101: b_alu_control = B_ALU_CTRL__ROR;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase
FUNCT7_ZBB__ZEXT:

FUNCT7_ZBB_ZEXT:
case (funct3)
3'b100:
case (rs2)
5'b00000: b_alu_control = B_ALU_CTRL__ZEXTH;
default: b_alu_control = B_ALU_CTRL__NONE;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase
default: b_alu_control = B_ALU_CTRL__NONE;
endcase
// TODO: Implement zbs into ALU decoder, also confirm what zbb instructions are being implemented.
default: b_alu_control = B_ALU_CTRL__NONE;

FUNCT7_ZBB__BSET:
if (funct3 == 3'b001)
b_alu_control = B_ALU_CTRL__BSET;
else
b_alu_control = B_ALU_CTRL__NONE;

FUNCT7_ZBB__BCLR:
case (funct3)
3'b001: b_alu_control = B_ALU_CTRL__BCLR;
3'b101: b_alu_control = B_ALU_CTRL__BEXT;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase

FUNCT7_ZBB__BINV:
if (funct3 == 3'b001)
b_alu_control = B_ALU_CTRL__BINV;
else
b_alu_control = B_ALU_CTRL__NONE;

default: b_alu_control = B_ALU_CTRL__NONE;
endcase

7'b0010011:
case (funct7)
7'b0110000:
case (funct3)
3'b001:
case (rs2)
5'b00100: b_alu_control = B_ALU_CTRL__SEXTB;
5'b00101: b_alu_control = B_ALU_CTRL__SEXTH;
5'b00000: b_alu_control = B_ALU_CTRL__CLZ;
5'b00001: b_alu_control = B_ALU_CTRL__CTZ;
5'b00010: b_alu_control = B_ALU_CTRL__CPOP;
5'b00100: b_alu_control = B_ALU_CTRL__SEXTB;
5'b00101: b_alu_control = B_ALU_CTRL__SEXTH;
5'b00000: b_alu_control = B_ALU_CTRL__CLZ;
5'b00001: b_alu_control = B_ALU_CTRL__CTZ;
5'b00010: b_alu_control = B_ALU_CTRL__CPOP;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase
3'b101: b_alu_control = B_ALU_CTRL__RORI;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase
FUNCT7_ZBB__ORCB:

FUNCT7_ZBB_ORCB:
case (funct3)
3'b101:
case (rs2)
5'b00111: b_alu_control = B_ALU_CTRL__ORCB;
default: b_alu_control = B_ALU_CTRL__NONE;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase
3'b001: b_alu_control = B_ALU_CTRL__BSET;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase

FUNCT7_ZBB__REV8:
FUNCT7_ZBB_REV8:
case (funct3)
3'b101:
case (rs2)
5'b11000: b_alu_control = B_ALU_CTRL__REV8;
default: b_alu_control = B_ALU_CTRL__NONE;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase
3'b001: b_alu_control = B_ALU_CTRL__BINV;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase

FUNCT7_ZBB__BCLR:
case (funct3)
3'b001: b_alu_control = B_ALU_CTRL__BCLR;
3'b101: b_alu_control = B_ALU_CTRL__BEXT;
default: b_alu_control = B_ALU_CTRL__NONE;
endcase

default: b_alu_control = B_ALU_CTRL__NONE;
endcase

default: b_alu_control = B_ALU_CTRL__NONE;
endcase

Expand Down
5 changes: 4 additions & 1 deletion src/ext/b/types.svh
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,6 @@

/* verilator lint_off DECLFILENAME */
package ext__b__types;
/* verilator lint_on DECLFILENAME */
typedef enum logic [4:0]
{ B_ALU_CTRL__NONE = 5'b00000
, B_ALU_CTRL__SH1ADD = 5'b00001
Expand All @@ -27,6 +26,10 @@ package ext__b__types;
, B_ALU_CTRL__RORI = 5'b10011
, B_ALU_CTRL__ORCB = 5'b10100
, B_ALU_CTRL__REV8 = 5'b10101
, B_ALU_CTRL__BCLR = 5'b10110
, B_ALU_CTRL__BSET = 5'b10111
, B_ALU_CTRL__BINV = 5'b11000
, B_ALU_CTRL__BEXT = 5'b11001
} b_alu_control_t;

endpackage
Expand Down
23 changes: 23 additions & 0 deletions src/ext/b/zbs.sv
Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
`include "src/timescale.svh"
`include "src/headers/types.svh"
`include "src/ext/b/types.svh"

module zbs
( input data_t reg1
, input logic [4:0] reg2
, input ext__b__types::b_alu_control_t b_alu_control
, output data_t out
);

import ext__b__types::*;

always_comb
case (b_alu_control)
B_ALU_CTRL__BCLR: out = reg1 & ~(data_t'(32'h1) << reg2);
B_ALU_CTRL__BSET: out = reg1 | (data_t'(32'h1) << reg2);
B_ALU_CTRL__BINV: out = reg1 ^ (data_t'(32'h1) << reg2);
B_ALU_CTRL__BEXT: out = (reg1 >> reg2) & data_t'(32'h1);
default: out = '0;
endcase

endmodule
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