Start RCC update to use ClockHelper v2.0 data

examples/stmicro/stm32/src/stm32f1xx/advanced_adc.zig

@@ -48,7 +48,12 @@ fn adc_to_temp(val: usize) f32 {
 }
 
 pub fn main() !void {
-    try rcc.apply_clock(.{ .ADCprescaler = .RCC_ADCPCLK2_DIV2 });
+    _ = try rcc.apply(.{
+        .ADCPresc = .RCC_ADCPCLK2_DIV2,
+        .flags = .{
+            .USE_ADC1 = true,
+        },
+    });
 
     rcc.enable_clock(.DMA1);
     rcc.enable_clock(.TIM2);

examples/stmicro/stm32/src/stm32f1xx/gpio.zig

@@ -7,12 +7,16 @@ const gpio = stm32.gpio;
 const time = stm32.time;
 
 pub fn main() !void {
-    try rcc.apply_clock(.{
-        .SysClkSource = .RCC_SYSCLKSOURCE_PLLCLK,
+    _ = try rcc.apply(.{
+        .SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK,
         .PLLSource = .RCC_PLLSOURCE_HSE,
         .PLLMUL = .RCC_PLL_MUL9,
-        .APB1Prescaler = .RCC_HCLK_DIV2,
-        .RTCClkSource = .RCC_RTCCLKSOURCE_LSI,
+        .APB1CLKDivider = .RCC_HCLK_DIV2,
+        .RTCClockSelection = .RCC_RTCCLKSOURCE_LSI,
+        .flags = .{
+            .RTCUsed_ForRCC = true,
+            .HSEOscillator = true,
+        },
     });
     rcc.enable_clock(.GPIOC);
 

examples/stmicro/stm32/src/stm32f1xx/rcc.zig

@@ -16,15 +16,20 @@ pub const microzig_options = microzig.Options{
 
 const clk_config = rcc.Config{
     .PLLSource = .RCC_PLLSOURCE_HSE,
-    .HSEDivPLL = .RCC_HSE_PREDIV_DIV2,
+    .HSEDivPLL = .RCC_HSE_PREDIV_DIV1,
     .PLLMUL = .RCC_PLL_MUL2,
-    .SysClkSource = .RCC_SYSCLKSOURCE_PLLCLK,
-    .APB1Prescaler = .RCC_HCLK_DIV1,
-    .MCOMult = .RCC_MCO1SOURCE_SYSCLK,
+    .SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK,
+    .APB1CLKDivider = .RCC_HCLK_DIV2,
+    .RCC_MCOSource = .RCC_MCO1SOURCE_SYSCLK,
+    .flags = .{
+        .HSEOscillator = true,
+        .MCOUsed_ForRCC = true,
+        .MCOConfig = true,
+    },
 };
 
 pub fn main() !void {
-    try rcc.apply_clock(clk_config);
+    _ = try rcc.apply(clk_config);
     rcc.enable_clock(.GPIOA);
     rcc.enable_clock(.AFIO);
     rcc.enable_clock(.USART1);

examples/stmicro/stm32/src/stm32f1xx/rtc.zig

@@ -30,7 +30,10 @@ pub fn main() !void {
     //by the system reset, so we need to check if it is already running.
     //If it is not running, we will configure it and enable it.
     if (fresh_start()) {
-        try rcc.apply_clock(.{ .RTCClkSource = .RCC_RTCCLKSOURCE_LSE });
+        _ = try rcc.apply(.{
+            .RTCClockSelection = .RCC_RTCCLKSOURCE_LSE,
+            .flags = .{ .RTCUsed_ForRCC = true, .LSEOscillator = true },
+        });
         rcc.enable_clock(.PWR);
         rcc.enable_clock(.BKP);
 
@@ -66,9 +69,10 @@ pub fn main() !void {
 }
 
 fn fresh_start() bool {
+    const power_down: bool = hal.Reset_Reason == .POR_or_PDR;
     rcc.enable_clock(.PWR);
     rcc.enable_clock(.BKP);
     const data: u32 = (@as(u32, bkp.BackupData1[1].data) << 16) | bkp.BackupData1[0].data;
     rcc.disable_all_clocks();
-    return data != 0xDEADBEEF;
+    return (data != 0xDEADBEEF) or power_down;
 }

examples/stmicro/stm32/src/stm32f1xx/timer.zig

@@ -10,6 +10,10 @@ const gpio = stm32.gpio;
 const GPTimer = stm32.timer.GPTimer;
 const time = stm32.time;
 
+//pub const microzig_options: microzig.Options = .{
+//    .interrupts = .{ .TIM3 = .{ .c = time.TIM_handler } },
+//};
+
 //gpios
 const ch1 = gpio.Pin.from_port(.A, 0);
 const ch2 = gpio.Pin.from_port(.A, 1);
@@ -23,7 +27,10 @@ pub fn main() !void {
     //first we need to enable the clocks for the GPIO and TIM peripherals
 
     //use HSE as system clock source, more stable than HSI
-    try rcc.apply_clock(.{ .SysClkSource = .RCC_SYSCLKSOURCE_HSE });
+    _ = try rcc.apply(.{
+        .SYSCLKSource = .RCC_SYSCLKSOURCE_HSE,
+        .flags = .{ .HSEOscillator = true },
+    });
 
     //enable GPIOA and TIM2, TIM3, AFIO clocks
     //AFIO is needed for alternate function remapping, not used in this example but eneble for easy remapping

examples/stmicro/stm32/src/stm32f1xx/timer_capture.zig

@@ -65,7 +65,10 @@ pub fn main() !void {
     //first we need to enable the clocks for the GPIO and TIM peripherals
 
     //use HSE as system clock source, more stable than HSI
-    try rcc.apply_clock(.{ .SysClkSource = .RCC_SYSCLKSOURCE_HSE });
+    _ = try rcc.apply(.{
+        .SYSCLKSource = .RCC_SYSCLKSOURCE_HSE,
+        .flags = .{ .HSEOscillator = true },
+    });
 
     //enable GPIOA and TIM2, TIM3, AFIO clocks
     //AFIO is needed for alternate function remapping, not used in this example but eneble for easy remapping

examples/stmicro/stm32/src/stm32f1xx/usb_cdc.zig

@@ -412,12 +412,16 @@ fn CDC_read(buf: []u8, timeout: ?Duration) ![]const u8 {
 }
 
 pub fn main() !void {
-    try rcc.apply_clock(.{
+    _ = try rcc.apply(.{
         .PLLSource = .RCC_PLLSOURCE_HSE,
         .PLLMUL = .RCC_PLL_MUL9,
-        .SysClkSource = .RCC_SYSCLKSOURCE_PLLCLK,
-        .APB1Prescaler = .RCC_HCLK_DIV2,
+        .SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK,
+        .APB1CLKDivider = .RCC_HCLK_DIV2,
         .USBPrescaler = .RCC_USBCLKSOURCE_PLL_DIV1_5,
+        .flags = .{
+            .HSEOscillator = true,
+            .USBUsed_ForRCC = true,
+        },
     });
 
     rcc.enable_clock(.GPIOA);

examples/stmicro/stm32/src/stm32f1xx/usb_hid.zig

@@ -256,12 +256,13 @@ fn report(keys: []const u8) void {
 }
 
 pub fn main() !void {
-    try rcc.apply_clock(.{
+    _ = try rcc.apply(.{
         .PLLSource = .RCC_PLLSOURCE_HSE,
         .PLLMUL = .RCC_PLL_MUL9,
-        .SysClkSource = .RCC_SYSCLKSOURCE_PLLCLK,
-        .APB1Prescaler = .RCC_HCLK_DIV2,
+        .SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK,
+        .APB1CLKDivider = .RCC_HCLK_DIV2,
         .USBPrescaler = .RCC_USBCLKSOURCE_PLL_DIV1_5,
+        .flags = .{ .HSEOscillator = true, .USBUsed_ForRCC = true },
     });
 
     rcc.enable_clock(.GPIOA);

port/stmicro/stm32/build.zig

@@ -15,7 +15,17 @@ boards: struct {
 
 pub fn init(dep: *std.Build.Dependency) Self {
     const b = dep.builder;
-    const chips = Chips.init(dep);
+
+    const clockhelper_dep = b.dependency("ClockHelper", .{}).module("clockhelper");
+
+    const hal_imports: []std.Build.Module.Import = b.allocator.dupe(std.Build.Module.Import, &.{
+        .{
+            .name = "ClockTree",
+            .module = clockhelper_dep,
+        },
+    }) catch @panic("out of memory");
+
+    const chips = Chips.init(dep, hal_imports);
 
     return .{
         .chips = chips,

port/stmicro/stm32/build.zig.zon

@@ -9,6 +9,10 @@
             .url = "git+https://github.com/embassy-rs/stm32-data-generated.git#5198a6e36b24f6d79c4ac91af5e61e8d54667d88",
             .hash = "N-V-__8AAFi8WBlOh-NikHFVBjzQE0F1KixgKjVWYnlijPNm",
         },
+        .ClockHelper = .{
+            .url = "git+https://github.com/ZigEmbeddedGroup/ClockHelper#7fd073b1be9544941c15f9a63032ed06149ddb70",
+            .hash = "ClockHelper-2.0.0-RcMaOSniGQHXH_qeoZbQDG64XThqpXTVPMfJ6P7LHpYY",
+        },
     },
     .paths = .{
         "README.md",