RK3506: Update to mainline u-boot 2026.07 + patches

config/boards/armsom-forge1.csc

@@ -2,11 +2,11 @@
 BOARD_NAME="ArmSoM Forge1"
 BOARD_VENDOR="armsom"
 BOARDFAMILY="rockchip"
-BOOTCONFIG="forge1-rk3506b_defconfig"
+BOOTCONFIG="forge1-rk3506j_defconfig"
 BOARD_MAINTAINER="amazingfate"
 INTRODUCED="2025"
 KERNEL_TARGET="vendor"
 KERNEL_TEST_TARGET="vendor"
-BOOT_FDT_FILE="rk3506b-armsom-forge1.dtb"
+BOOT_FDT_FILE="rk3506j-armsom-forge1.dtb"
 IMAGE_PARTITION_TABLE="gpt"
 BOOT_SOC="rk3506b"

config/sources/families/rockchip.conf

@@ -64,10 +64,8 @@ elif [[ "$BOOT_SOC" == "rk3506" || "$BOOT_SOC" == "rk3506b" ]]; then
 	TEE_BLOB="${TEE_BLOB:-"rk35/rk3506_tee_v2.10.bin"}"
 	UBOOT_TARGET_MAP="ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB} TEE=${RKBIN_DIR}/${TEE_BLOB};;u-boot-rockchip.bin"
 
-	BOOTSOURCE="https://source.denx.de/u-boot/contributors/kwiboo/u-boot.git"
-	# kwiboo's 'rk3506' branch is WIP / rebased often. Pin to a tested commit until upstream work is complete.
-	BOOTBRANCH="commit:0b8e25bd9e16e8043b600e8f49b926b95572dc47"
-	BOOTPATCHDIR="u-boot-rk3506"
+	BOOTBRANCH='tag:v2026.07'
+	BOOTPATCHDIR='v2026.07-rk3506'
 	BOOTDIR="u-boot-rk3506"
 fi
 

patch/u-boot/v2026.07-rk3506/0001-rockchip-spl-Allow-use-of-ROCKCHIP_SPL_RESERVE_IRAM-on-ARMv7.patch

@@ -0,0 +1,72 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Sat, 4 Jul 2026 02:27:31 +0000
+Subject: rockchip: spl: Allow use of ROCKCHIP_SPL_RESERVE_IRAM on ARMv7
+
+Users of ROCKCHIP_SPL_RESERVE_IRAM started to be removed with the commit
+5ce94c74a6b5 ("rockchip: rk3399: defconfig: no need to reserve IRAM for
+SPL") in v2020.01-rc2, and since the commit 49f8131e5594 ("rockchip:
+rk3399-gru: Use TPL with common bss and stack addresses") in
+v2025.04-rc1 there is no more users of this Kconfig option.
+
+Traditionaly the SPL image is loaded to start of DRAM on Rockchip
+platform. However, vendor OP-TEE or TF-A blobs for a few newer RK SoCs,
+e.g. RK3506 and RV1126B, are expected to be loaded at or close to start
+of DRAM, something that would overlap SPL.
+
+The IDBlock v2 format used on these SoCs can instruct BootROM to load
+an image to specific load address. However, mkimage currently lacks
+support to configure a different load address for SPL image.
+
+The Kconfig option ROCKCHIP_SPL_RESERVE_IRAM can be used to create
+enough free space at begining of DRAM for OP-TEE/TF-A to safely be
+loaded without overwriting SPL.
+
+Move the .space statement prior to _start on ARMv7 to allow use of the
+ROCKCHIP_SPL_RESERVE_IRAM option on ARMv7.
+
+Signed-off-by: Austin Lane <vidplace7@gmail.com>
+---
+ arch/arm/include/asm/arch-rockchip/boot0.h | 9 ++++-----
+ arch/arm/mach-rockchip/Kconfig             | 1 +
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
+index 111111111111..222222222222 100644
+--- a/arch/arm/include/asm/arch-rockchip/boot0.h
++++ b/arch/arm/include/asm/arch-rockchip/boot0.h
+@@ -44,6 +44,10 @@ entry_counter:
+ 	b reset
+ #endif
+
++#if defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
++	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for TF-A/OP-TEE */
++#endif
++
+ #if !defined(CONFIG_ARM64)
+ 	/*
+ 	 * For armv7, the addr '_start' will used as vector start address
+@@ -53,8 +57,3 @@ entry_counter:
+ _start:
+ 	ARM_VECTORS
+ #endif
+-
+-#if !defined(CONFIG_TPL_BUILD) && defined(CONFIG_XPL_BUILD) && \
+-	(CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
+-	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
+-#endif
+diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
+index 111111111111..222222222222 100644
+--- a/arch/arm/mach-rockchip/Kconfig
++++ b/arch/arm/mach-rockchip/Kconfig
+@@ -680,6 +680,7 @@ config ROCKCHIP_STIMER_BASE
+ config ROCKCHIP_SPL_RESERVE_IRAM
+ 	hex "Size of IRAM reserved in SPL"
+ 	default 0x0
++	depends on SPL
+ 	help
+ 	  SPL may need reserve memory for firmware loaded by SPL, whose load
+ 	  address is in IRAM and may overlay with SPL text area if not
+-- 
+Armbian
+