Issues

• [USB][Integration] Clarification on UTMI and ULPI Interface Selection

  chipsalliance/usb2#56 · Filter by author cory-chiang opened on Oct 19, 2026

• [RTL] CDC violations on power management signals

  Bug

  chipsalliance/usb2#50 · Filter by author clayton8 opened on Oct 6, 2026
  

• [Enhancement] Pipeline AXI-to-AHB bursts for one beat per clock

  enhancement
  Feature

  chipsalliance/usb2#46 · Filter by author clayton8 opened on Oct 1, 2026
  

• Finding of register access test

  documentation
  Bug

  chipsalliance/usb2#41 · Filter by author paolopiscopo opened on Sep 28, 2026
  

• Decision on how to tie USB_EnableHub is pending

  enhancement
  Feature

  chipsalliance/usb2#40 · Filter by author paolopiscopo opened on Sep 28, 2026
  

• bInterval default value will be updated

  bug
  Bug

  chipsalliance/usb2#39 · Filter by author paolopiscopo opened on Sep 28, 2026
  1

  

• Remove DMA terminology from USB docs

  chipsalliance/usb2#33 · Filter by author calebofearth opened on Sep 23, 2026

• Clean up: remove single-device 3516 design (replaced by hub)

  enhancement
  chipsalliance/usb2#32 · Filter by author calebofearth opened on Sep 22, 2026
  

• Misaligned bMaxPower between config and other_speed_config descriptor of the hub

  bug
  Bug

  chipsalliance/usb2#31 · Filter by author paolopiscopo opened on Sep 22, 2026
  1

  

• OCP PR feedback: signal refactors for readability

  enhancement
  chipsalliance/usb2#30 · Filter by author calebofearth opened on Sep 22, 2026
  

• OCP PR feedback: file lists cleanup

  enhancement
  chipsalliance/usb2#29 · Filter by author calebofearth opened on Sep 22, 2026
  

• Execution of some get commands was resulting in out of range access to hub memory

  bug
  Bug

  chipsalliance/usb2#27 · Filter by author paolopiscopo opened on Sep 21, 2026
  

• Handle AXI write strobes in axi_to_ahb

  Task

  chipsalliance/usb2#20 · Filter by author clayton8 opened on Sep 12, 2026

• Guard DEV1 CSR against unsupported AXI transfer sizes

  chipsalliance/usb2#19 · Filter by author clayton8 opened on Sep 12, 2026

• USB Hub cleanup

  chipsalliance/usb2#16 · Filter by author calebofearth opened on Sep 1, 2026
  1

  

• [DOC] Clarify Who shold be clearing DCON before SoC Reset

  documentation
  Task

  chipsalliance/usb2#15 · Filter by author clayton8 opened on Sep 1, 2026

• Add validation cases, coverage points, and test plan entries to verify PROTOCOL STALL in response to PROTOCOL ERROR

  Task

  chipsalliance/usb2#13 · Filter by author calebofearth opened on Aug 29, 2026
  

• [RTL] Add lock to Hub RAM Configuration

  Feature

  chipsalliance/usb2#11 · Filter by author clayton8 opened on Aug 28, 2026
  2

  

• [DOC] Clarify Cold Boot Scenario Organization

  chipsalliance/usb2#9 · Filter by author pdurgesh opened on Aug 25, 2026

• [DOC] Add additional architectural description in HUB control chapter addressing the comments.

  chipsalliance/usb2#8 · Filter by author pdurgesh opened on Aug 25, 2026

• [DV] Testcases related to USB interrupt and error handling should be added in verification tests

  chipsalliance/usb2#7 · Filter by author pdurgesh opened on Aug 25, 2026

• [DV] Add Verification Test Cases for Memory Safety and Security Rules

  chipsalliance/usb2#5 · Filter by author pdurgesh opened on Aug 24, 2026

• [DOC] Are there any scenarios of hub only reset? If so, what wld downstream flows be?

  chipsalliance/usb2#4 · Filter by author pdurgesh opened on Aug 24, 2026