Detect RISC-V RVV support from target flags

[KimmyXYC]

Summary

• Detect RVV and Zvfhmin support using the active compiler target flags.
• Enable the RISC-V vector kernels only when the compiler probe succeeds.
• Fall back to scalar implementations for lower RISC-V target baselines.
• Remove per-source -march=rv64gcv_zvfhmin and -mabi=lp64d overrides.

Motivation

Faiss currently selects RVV kernels for every RISC-V target and forces a specific architecture through per-source compiler options. This can make binaries incompatible with lower target baselines and bypass distribution compiler flags.

Automatic detection keeps lower baselines portable while still enabling the RVV implementations when the selected target provides both RVV and Zvfhmin.

Testing

Tested through openRuyi OBS builds:

• RVA20/RISC-V: the probe failed as expected, scalar implementations were used, and the build and checks succeeded.
• RVA23/RISC-V: the probe succeeded, RVV sources were compiled, and the build and checks succeeded.
• AMD64: the RISC-V probe was skipped and the build and checks succeeded.

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