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feat(vpto): extend post-update ops - #1134

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yexiaosu wants to merge 12 commits into
hw-native-sys:mainfrom
yexiaosu:vmi-post-update-4
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feat(vpto): extend post-update ops#1134
yexiaosu wants to merge 12 commits into
hw-native-sys:mainfrom
yexiaosu:vmi-post-update-4

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@yexiaosu

@yexiaosu yexiaosu commented Aug 4, 2026

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Summary

Implement Step 4 of VPTOSoftPostUpdate for issue #941: extend the VPTO post-update contract, soft-pass rewriting, and LLVM lowering to nine additional A5 memory operations:

  • pto.vldsx2
  • pto.vsldb
  • pto.plds
  • pto.pldi
  • pto.psts
  • pto.psti
  • pto.sprsts
  • pto.sprsti
  • pto.vstas

This builds on the loop and sequential analyses introduced in the previous steps and reuses the same generic rewriting infrastructure.

Key changes

  • Add optional updated_base results and corresponding verification.
  • Extend loop and sequential soft-post-update rewriting to the nine operations.
  • Model operation-specific address units:
    • element: vldsx2, vstas
    • 32-byte block: vsldb
    • byte: plds, psts, sprsts
    • target-dependent alignment: pldi, psti, sprsti
  • Add A5 DIST-dependent predicate alignment rules.
  • Preserve signed SPR offsets and normalize i32 offsets before pto.addptr.

Test coverage

Add lit coverage for IR verification, soft-pass rewriting, address-unit conversion, intrinsic ABI, both LLVM emitters, unsupported targets, and mixed-unit regressions.

Add seven A5 runtime cases covering direct post forms and normal-to-post soft-pass conversion.

Validation

  • PTOAS build: PASS
  • Focused lit tests: PASS
  • CANN 9.0.0 and beta1 LLVM checks: PASS
  • A5 SIM runtime cases: 7/7 passed

@yexiaosu
yexiaosu force-pushed the vmi-post-update-4 branch from dd3606a to f3cb040 Compare August 5, 2026 06:51
@yexiaosu
yexiaosu force-pushed the vmi-post-update-4 branch from f3cb040 to 93dc918 Compare August 5, 2026 07:49
Extend the VPTO ops, verifiers, LLVM emitters, and soft post-update rewrite to support vldus and vstus post forms.

Treat the vstus offset as a post-access stream stride rather than an initial pointer displacement, and add lit plus SIM runtime coverage for the resulting base semantics.
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