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Add multilayer neural network #306
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5a650fd
pairwise initial
kevlu8 9b1139b
vectorize
wdotmathree eee1382
multilayer
wdotmathree cc2e4f8
adjust nnue scale
kevlu8 7b8d4b4
Vectorize
wdotmathree b22d98b
Preclip accumulator
wdotmathree c172674
Fix cast
wdotmathree 3ba6dfe
Align
wdotmathree ced7240
fix misaligned accumulator
kevlu8 2e290f9
temporarily set bench to 1 because of floats
kevlu8 ed497bc
Basic cleanup and fix consistency issue
wdotmathree 1dbce21
Fix pairwise
wdotmathree 8e12be7
Fix L1 accumulate width
wdotmathree d56d9d2
Flip iteration direction
wdotmathree 1b6c588
Unroll L2
wdotmathree 9b174c1
Unroll L1
wdotmathree eb248ad
Readd FMA
wdotmathree 946e363
Extract intrinsics into simd.cpp
wdotmathree abe4910
Prepare for SPSA tune
kevlu8 43a8b4c
Add tuned values
kevlu8 7832580
Implement AVX512 functions (broken)
wdotmathree 758341c
Fix AVX SIMD lane size issue
kevlu8 4f60c25
Fix bench consistency issues
wdotmathree f718147
Fix VNNI reduction
wdotmathree 85b6170
Cleanup
wdotmathree f0f6eaa
Fix stuff
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,96 @@ | ||
| #pragma once | ||
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| #include "simd.hpp" | ||
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| ivec simd::setzero_ivec() { | ||
| return _mm256_setzero_si256(); | ||
| } | ||
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| fvec simd::setzero_fvec() { | ||
| return _mm256_setzero_ps(); | ||
| } | ||
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| ivec simd::broadcast_i16(int16_t x) { | ||
| return _mm256_set1_epi16(x); | ||
| } | ||
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| fvec simd::broadcast_f32(float x) { | ||
| return _mm256_set1_ps(x); | ||
| } | ||
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| ivec simd::load_ivec(const ivec *p) { | ||
| return _mm256_loadu_si256(p); | ||
| } | ||
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| fvec simd::load_fvec(const float *p) { | ||
| return _mm256_loadu_ps(p); | ||
| } | ||
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| ivec simd::clamp_i16(ivec x, ivec lo, ivec hi) { | ||
| x = _mm256_max_epi16(x, lo); | ||
| x = _mm256_min_epi16(x, hi); | ||
| return x; | ||
| } | ||
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| fvec simd::clamp_f32(fvec x, fvec lo, fvec hi) { | ||
| x = _mm256_max_ps(x, lo); | ||
| x = _mm256_min_ps(x, hi); | ||
| return x; | ||
| } | ||
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| ivec simd::shift_mulhi(ivec a, ivec b) { | ||
| a = _mm256_slli_epi16(a, 7); | ||
| return _mm256_mulhrs_epi16(a, b); | ||
| } | ||
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| ivec simd::accdp_u8i8_i16(ivec a, ivec b, ivec c) { | ||
| ivec sum = _mm256_maddubs_epi16(a, b); | ||
| return _mm256_add_epi16(sum, c); | ||
| } | ||
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| fvec simd::cvt_i32_f32(ivec v) { | ||
| return _mm256_cvtepi32_ps(v); | ||
| } | ||
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| fvec simd::fma_f32(fvec a, fvec b, fvec c) { | ||
| return _mm256_fmadd_ps(a, b, c); | ||
| } | ||
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| fvec simd::mul_f32(fvec a, fvec b) { | ||
| return _mm256_mul_ps(a, b); | ||
| } | ||
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| fvec simd::add_f32(fvec a, fvec b) { | ||
| return _mm256_add_ps(a, b); | ||
| } | ||
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| void simd::store_f32(float *p, fvec v) { | ||
| _mm256_storeu_ps(p, v); | ||
| } | ||
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| void simd::store_u16_u8(uint8_t *p, ivec v) { | ||
| __m256i res = _mm256_packus_epi16(v, v); | ||
| res = _mm256_permute4x64_epi64(res, _MM_PERM_DCCA); | ||
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| _mm_storeu_si128((__m128i *)p, _mm256_castsi256_si128(res)); | ||
| } | ||
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| float simd::reduce_add_ps(fvec v) { | ||
| __m128 sum = _mm_add_ps(_mm256_castps256_ps128(v), _mm256_extractf128_ps(v, 1)); | ||
| sum = _mm_add_ps(sum, _mm_movehdup_ps(sum)); | ||
| sum = _mm_add_ps(sum, _mm_movehl_ps(sum, sum)); | ||
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| return _mm_cvtss_f32(sum); | ||
| } | ||
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| int32_t simd::reduce_add_epi16(ivec v) { | ||
| const __m256i ones = _mm256_set1_epi16(1); | ||
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| __m256i wide = _mm256_madd_epi16(v, ones); | ||
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| __m128i sum = _mm_add_epi32(_mm256_castsi256_si128(wide), _mm256_extracti128_si256(wide, 1)); | ||
| sum = _mm_add_epi32(sum, _mm_shuffle_epi32(sum, _MM_SHUFFLE(1, 0, 3, 2))); | ||
| sum = _mm_add_epi32(sum, _mm_shuffle_epi32(sum, _MM_SHUFFLE(2, 3, 0, 1))); | ||
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| return _mm_cvtsi128_si32(sum); | ||
| } | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,96 @@ | ||
| #pragma once | ||
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| #if defined(__AVX512BW__) | ||
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| #include "simd.hpp" | ||
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| ivec simd::setzero_ivec() { | ||
| return _mm512_setzero_si512(); | ||
| } | ||
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| fvec simd::setzero_fvec() { | ||
| return _mm512_setzero_ps(); | ||
| } | ||
|
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| ivec simd::broadcast_i16(int16_t x) { | ||
| return _mm512_set1_epi16(x); | ||
| } | ||
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| fvec simd::broadcast_f32(float x) { | ||
| return _mm512_set1_ps(x); | ||
| } | ||
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| ivec simd::load_ivec(const ivec *p) { | ||
| return _mm512_loadu_si512(p); | ||
| } | ||
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| fvec simd::load_fvec(const float *p) { | ||
| return _mm512_loadu_ps(p); | ||
| } | ||
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| ivec simd::clamp_i16(ivec x, ivec lo, ivec hi) { | ||
| x = _mm512_max_epi16(x, lo); | ||
| x = _mm512_min_epi16(x, hi); | ||
| return x; | ||
| } | ||
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| fvec simd::clamp_f32(fvec x, fvec lo, fvec hi) { | ||
| x = _mm512_max_ps(x, lo); | ||
| x = _mm512_min_ps(x, hi); | ||
| return x; | ||
| } | ||
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| ivec simd::shift_mulhi(ivec a, ivec b) { | ||
| a = _mm512_slli_epi16(a, 7); | ||
| return _mm512_mulhrs_epi16(a, b); | ||
| } | ||
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| ivec simd::accdp_u8i8_i16(ivec a, ivec b, ivec c) { | ||
| #if defined(__AVX512VNNI__) | ||
| return _mm512_dpbusd_epi32(c, a, b); | ||
| #else | ||
| ivec sum = _mm512_maddubs_epi16(a, b); | ||
| return _mm512_add_epi16(sum, c); | ||
| #endif | ||
| } | ||
|
kevlu8 marked this conversation as resolved.
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| fvec simd::cvt_i32_f32(ivec v) { | ||
| return _mm512_cvtepi32_ps(v); | ||
| } | ||
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| fvec simd::fma_f32(fvec a, fvec b, fvec c) { | ||
| return _mm512_fmadd_ps(a, b, c); | ||
| } | ||
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| fvec simd::mul_f32(fvec a, fvec b) { | ||
| return _mm512_mul_ps(a, b); | ||
| } | ||
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| fvec simd::add_f32(fvec a, fvec b) { | ||
| return _mm512_add_ps(a, b); | ||
| } | ||
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| void simd::store_f32(float *p, fvec v) { | ||
| _mm512_storeu_ps(p, v); | ||
| } | ||
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| void simd::store_u16_u8(uint8_t *p, ivec v) { | ||
| _mm256_storeu_si256((__m256i *)p, _mm512_cvtusepi16_epi8(v)); | ||
| } | ||
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| float simd::reduce_add_ps(fvec v) { | ||
| return _mm512_reduce_add_ps(v); | ||
| } | ||
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| int32_t simd::reduce_add_epi16(ivec v) { | ||
| #if defined(__AVX512VNNI__) | ||
| __m512i wide = v; | ||
| #else | ||
| const __m512i ones = _mm512_set1_epi16(1); | ||
| __m512i wide = _mm512_madd_epi16(v, ones); | ||
| #endif | ||
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| return _mm512_reduce_add_epi32(wide); | ||
| } | ||
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| #endif | ||
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