[AMDGPU] Apply alignment attr for make.buffer.rsrc #166914
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -5220,6 +5220,13 @@ static unsigned getKnownAlignForUse(Attributor &A, AAAlign &QueryingAA, | |
| return AlignAA->getKnownAlign().value(); | ||
| break; | ||
| } | ||
| case Intrinsic::amdgcn_make_buffer_rsrc: { | ||
| const auto *AlignAA = A.getAAFor<AAAlign>( | ||
| QueryingAA, IRPosition::value(*II), DepClassTy::NONE); | ||
| if (AlignAA) | ||
| return AlignAA->getKnownAlign().value(); | ||
| break; | ||
| } | ||
| default: | ||
| break; | ||
| } | ||
|
|
@@ -5543,7 +5550,7 @@ struct AAAlignCallSiteReturned final | |
| const auto *AlignAA = | ||
| A.getAAFor<AAAlign>(*this, IRPosition::value(*(II->getOperand(0))), | ||
| DepClassTy::REQUIRED); | ||
| if (AlignAA) { | ||
|
Contributor
There was a problem hiding this comment. not sure about this change
Contributor
Author
There was a problem hiding this comment. Hi @shiltian , if I'm not wrong the AAAlign would be invalid if assumed alignment is 1: /// See AbstractState::isValidState()
/// NOTE: For now we simply pretend that the worst possible state is invalid.
bool isValidState() const override { return Assumed != getWorstState(); }In this case, if mask is not valid, then assumed alignment of ptrmask should also be 1... |
||
| Alignment = std::max(AlignAA->getAssumedAlign(), Alignment); | ||
| Valid = true; | ||
| } | ||
|
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@@ -5554,6 +5561,18 @@ struct AAAlignCallSiteReturned final | |
| std::min(this->getAssumedAlign(), Alignment).value()); | ||
| break; | ||
| } | ||
| // FIXME: Should introduce target specific sub-attributes and letting | ||
| // getAAfor<AAAlign> lead to create sub-attribute to handle target | ||
| // specific intrinsics. | ||
| case Intrinsic::amdgcn_make_buffer_rsrc: { | ||
| const auto *AlignAA = | ||
| A.getAAFor<AAAlign>(*this, IRPosition::value(*(II->getOperand(0))), | ||
| DepClassTy::REQUIRED); | ||
| if (AlignAA) | ||
| return clampStateAndIndicateChange<StateType>( | ||
| this->getState(), AlignAA->getAssumedAlign().value()); | ||
| break; | ||
| } | ||
| default: | ||
| break; | ||
| } | ||
|
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||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,40 @@ | ||
| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 | ||
| ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-attributor %s -o - | FileCheck %s | ||
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||
| define float @align_back_prop(ptr addrspace(1) align 4 %x) { | ||
| ; CHECK-LABEL: define float @align_back_prop( | ||
| ; CHECK-SAME: ptr addrspace(1) align 8 [[X:%.*]]) #[[ATTR0:[0-9]+]] { | ||
| ; CHECK-NEXT: [[FAT_PTR:%.*]] = call align 8 ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p1(ptr addrspace(1) [[X]], i16 0, i64 256, i32 0) | ||
| ; CHECK-NEXT: [[Y:%.*]] = load float, ptr addrspace(7) [[FAT_PTR]], align 8 | ||
| ; CHECK-NEXT: ret float [[Y]] | ||
| ; | ||
| %fat.ptr = call ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p1(ptr addrspace(1) %x, i16 0, i64 256, i32 0) | ||
| %y = load float, ptr addrspace(7) %fat.ptr, align 8 | ||
| ret float %y | ||
| } | ||
|
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||
| define float @align_foward_prop(ptr addrspace(1) align 8 %x) { | ||
| ; CHECK-LABEL: define float @align_foward_prop( | ||
| ; CHECK-SAME: ptr addrspace(1) align 8 [[X:%.*]]) #[[ATTR0]] { | ||
| ; CHECK-NEXT: [[FAT_PTR:%.*]] = call align 8 ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p1(ptr addrspace(1) [[X]], i16 0, i64 256, i32 0) | ||
| ; CHECK-NEXT: [[Y:%.*]] = load float, ptr addrspace(7) [[FAT_PTR]], align 8 | ||
| ; CHECK-NEXT: ret float [[Y]] | ||
| ; | ||
| %fat.ptr = call ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p1(ptr addrspace(1) %x, i16 0, i64 256, i32 0) | ||
| %y = load float, ptr addrspace(7) %fat.ptr, align 4 | ||
| ret float %y | ||
| } | ||
|
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||
| define float @align_mix_prop(ptr addrspace(1) align 4 %x) { | ||
| ; CHECK-LABEL: define float @align_mix_prop( | ||
| ; CHECK-SAME: ptr addrspace(1) align 8 [[X:%.*]]) #[[ATTR0]] { | ||
| ; CHECK-NEXT: [[FAT_PTR:%.*]] = call align 8 ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p1(ptr addrspace(1) [[X]], i16 0, i64 256, i32 0) | ||
| ; CHECK-NEXT: [[Y:%.*]] = load float, ptr addrspace(7) [[FAT_PTR]], align 8 | ||
| ; CHECK-NEXT: [[Z:%.*]] = load float, ptr addrspace(1) [[X]], align 8 | ||
| ; CHECK-NEXT: ret float [[Z]] | ||
| ; | ||
| %fat.ptr = call ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p1(ptr addrspace(1) %x, i16 0, i64 256, i32 0) | ||
| %y = load float, ptr addrspace(7) %fat.ptr, align 2 | ||
| %z = load float, ptr addrspace(1) %x, align 8 | ||
| ret float %z | ||
| } |
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add a comment here regarding the handling of target specific handling and some future direction that we might take.