[DRAFT] Deeploy for GAP9 Platform

[runwangdl]

Summary

This PR adds complete GAP9 platform support to Deeploy, including platform integration, DMA support, tiling capabilities, CI/CD workflows, and comprehensive testing infrastructure. This represents 20 commits specifically focused on GAP9 development.

Added

GAP9 Platform Support

• Initial GAP9 platform integration with full deployer, bindings, and platform configuration (Deeploy/Targets/GAP9/)
• GAP9 DMA support with L3 DMA and Mchan DMA implementations
• GAP9-specific memory allocation and free templates
• GAP9 tiling support for L3 memory
• GAP9 CI/CD workflows (.github/workflows/_runner-gap9.yml, .github/workflows/ci-platform-gap9.yml, .github/workflows/ci-platform-gap9-tiled.yml)
• Link to PULP-NN, PULP kernels, and Math libraries for GAP9
• GAP9 SDK configuration with cluster stack macros
• GAP9 GVSoC simulation support

Changed

• Minimally modified PULP kernel syntax to fix GAP9 compiler issues. Changes are minimal and maintain compatibility with PULP kernels with GAP9 GCC toolchain-specific requirements
  - Transpose operator: Fixed GCC segmentation fault caused by template syntax (commit 9ca4595)
  - LayerNorm operator: Resolved epsilon ABI compatibility issue (commit 6b5c2e5)

Known Limitations

• L3-L2 Async DMA - Currently synchronous; async blocked by Siracusa inheritance
• NE16 Accelerator - Not yet integrated
• AutoTiler DW/PW - GAP9 SDK AutoTiler kernels not integrated
• GAP9 Float Math - Limited coverage (affects RMSNorm, etc.)

Platform Capabilities

✅ Multi-core (1-8) | ✅ L1/L2/L3 memory | ✅ Multi-channel DMA
✅ GVSoC simulation | ✅ Tiling | ✅ PULP-NN integration

PR Merge Checklist

1. The PR is rebased on the latest devel commit and pointing to devel.
2. Your PR reviewed and approved.
3. All checks are passing.
4. The CHANGELOG.md file has been updated.
5. If the docker was modified, change back its link after review.