tests: riscv: Add unit tests for riscv_pmp_decode_region #99523
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fsammoura1980
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| PMP_R | PMP_W | PMP_X, result); | ||
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| ZTEST(riscv_pmp_memattr_entries, test_pmp_tor_index_0) |
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Thanks a lot for the tests! They don't seem to be related to the mem-attr property per se, so I'd prefer them to be moved to a separate test under tests/arch/riscv/pmp.
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This commit introduces a suite of unit tests for the `pmp_decode_region` function using the Ztest framework. The tests validate the correct calculation of start and end addresses for various RISC-V PMP (Physical Memory Protection) entry configurations. The following scenarios are covered: - TOR (Top of Range) mode for index 0. - TOR (Top of Range) mode for index > 0. - NA4 (Naturally Aligned Four-byte) mode. - NAPOT (Naturally Aligned Power-of-Two) mode. - Default behavior for a disabled PMP entry. These tests ensure the PMP region decoding logic is accurate across different addressing modes. Signed-off-by: Firas Sammoura <[email protected]>
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This commit introduces a suite of unit tests for the
pmp_decode_regionfunction using the Ztest framework. The tests validate the correct calculation of start and end addresses for various RISC-V PMP (Physical Memory Protection) entry configurations.The following scenarios are covered:
These tests ensure the PMP region decoding logic is accurate across different addressing modes.