Clock operation

Clocking system is the feature of Sonochan MkII that makes it fundamentally different from a normal USB Audio Class 1 (UAC1) device. In this section, the system will be described in closer detail.

SMkII clock system goals are following:

1. Avoid losing samples due to buffer underrun/overrun by adaptive clock adjustments
2. Avoid OS-side re-sampling by supporting many sampling rates natively (usual UAC1 device offer just one or two native sampling rates)
3. Allow user-adjustable clock for clock-related testing (usual UAC1 runs fixed master clock)
4. Allow user-configurable clock multipliers to support various DUT

Clock generation

System-wise, the main clock from which the other clocks are derived, is the Master Clock (MCLK).

However, user-wise, the main value is the sampling frequency. Sampling frequency is selected in the audio application, either in some settings or simply derived from sampling frequency of the audio file being played.

The audio application informs USB Audio device (=SMkII) about the sampling frequency. SMkII then uses this sampling frequency value and:

• derives Frame Synchronization frequency (FSYNC) based on this sampling frequency (FSYNC = sampling frequency)
• derives Bit Clock (BCLK) signal based on FSYNC and user-configured multiplier. BCLK is always higher than FSYNC, at least as many times as there is bits in the sample word and number of channels.
• derives Master Clock (MCLK) signal based on FSYNC and user-configured multiplier. MCLK is always higher or equal to MCLK.

Therefore, the final clock values used in SMkII are result of:

• Configuration settings (the MCLK and BCLK multipliers and MCLK adjustment offset)
• Audio application settings (FSYNC as the sampling frequency)

Adaptive clock adjustments

Adaptive clock adjustment is mechanism which prevents buffer overrun/underrun by adjusting clock speed (buffer full -> speed-up clock, buffer empty -> slow down clock.

SMkII employs two methods of clock adjustment:

USB Feedback endpoint

UAC1 standard defines two modes of delivering audio data over USB:

• isosynchronous mode
• asynchronous mode

SMkII uses only asynchronous mode of operation. In asynchronous mode, it is expected that the OS clock and the UAC1 clock may diverge and there will be a risk of buffer overrun/underrun.

For that reason, UAC1 standard defines an optional feedback endpoint (USB logic), which allows UAC1 device to "tell" the host OS to adjust the sample rate by small amount (e.g. from 48000 Hz to 47999 Hz) to prevent data loss without "serious" audible effects for a listener.

SMkII attempts to use this mechanism every time it's available. While generally supported on Linux, the feedback endpoint implementation on Windows is bad or nonexistent, and therefore cannot be relied upon.

Adaptive (Auto-tune) PLL

When data stream cannot be controlled on the OS side, it's still possible to avoid buffering problems by directly adjusting the MCLK generator. For that exact reason, SMkII uses a precise Phased-locked loop (PLL) IC for the main clock generation and adjusts it's settings based on the buffer state.

This method is configurable using the Auto tune PLL when audio feedback not work in the user-configured multiplier. As the name suggests, this method is only used when the above-described feedback endpoint method fails.

When adaptive PLL is active, the updated value of MCLK is displayed on SMkII LCD (#6).

Fixed clock adjustments

For measurement purposes, it's sometimes desirable to adjust the MCLK manually by some value. For that reason, SMkII configuration offers Offset of MCLK in PPM option.

When using this option, the Adaptive (Auto-tune) option must be disabled.