arch: arm: cortex_m: Allow VTOR to be relocated to TCM

[PetervdPerk-NXP]

This change allows you to move the interrupt vector table to ITCM or DTCM instead of SRAM, which provides deterministic, single-cycle access, unlike multi-cycle SRAM reads that may incur additional wait states. This reduces exception entry latency and benefits real-time and interrupt-driven workloads.

Both ITCM and DTCM are supported for vector table placement. ITCM is accessed via the CPU instruction bus and typically provides the lowest possible interrupt latency, making it the preferred location when available. DTCM, while on the data bus, still offers significantly faster and more predictable access compared to SRAM and serves as a suitable alternative where ITCM is unavailable or reserved for hot code.

[PetervdPerk-NXP]

@dcpleung
I dug a bit further into the ARM TCM documentation, ITCM appears to be the best choice for vector table placement due to how interrupt handling on a cortex-m uses the instruction bus, but both ITCM and DTCM are supported. I’ve updated the PR to support both options and clarified the differences in the Kconfig help text.

[wearyzen]

Could you refer to the MPS3 boards which already use ITCM and DTCM without these extra configs?

zephyr/boards/arm/mps3/mps3_corstone300_fvp.dts

Line 22 in 1380739

zephyr,sram = &dtcm;

Another example where MPS3 board selects SRAM for flash and code but still uses ITCM for vector table:

zephyr/boards/arm/mps3/mps3_corstone310_fvp.dts

Line 22 in 1380739

zephyr,sram = &sram;

zephyr/boards/arm/mps3/Kconfig.defconfig

Line 43 in 1380739

default $(dt_nodelabel_reg_addr_hex,itcm)

[PetervdPerk-NXP]

Could you refer to the MPS3 boards which already use ITCM and DTCM without these extra configs?

zephyr/boards/arm/mps3/mps3_corstone300_fvp.dts

Line 22 in 1380739

zephyr,sram = &dtcm;

In that example the MPS3 uses DTCM as primary ram setting zephyr,sram to DTCM, then this doesn't apply because if CONFIG_SRAM_VECTOR_TABLE gets used then RAMABLE_REGION is is equal to DTCM memory.

This is why we depend on $(dt_chosen_enabled,$(DT_CHOSEN_Z_DTCM)) if zephyr,dtcm or zephyr,itcm is set then we can oly relocate the vector table to DTCM or ITCM.

In the case for example the vmu_rt1170 the primary ram is &ocram and has seperate DTCM and ITCM entries.

zephyr/boards/nxp/vmu_rt1170/vmu_rt1170_mimxrt1176_cm7.dts

Line 29 in 1380739

zephyr,sram = &ocram1; /* TODO Merge with other OCRAM */

In this case

zephyr/boards/arm/mps3/Kconfig.defconfig

Line 43 in 1380739

default $(dt_nodelabel_reg_addr_hex,itcm)

The MPS3 seems to fully executing from ITCM so no XIP from flash but then CONFIG_SRAM_VECTOR_TABLE wouldn't be applicable at all anyhow.

[sonarqubecloud]

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud